參數資料
型號: MC68332ACFC16B1
廠商: Freescale Semiconductor
文件頁數: 43/88頁
文件大?。?/td> 0K
描述: IC MCU 32BIT 16MHZ 132-PQFP
標準包裝: 180
系列: M683xx
核心處理器: CPU32
芯體尺寸: 32-位
速度: 16MHz
連通性: EBI/EMI,SCI,SPI,UART/USART
外圍設備: POR,PWM,WDT
輸入/輸出數: 15
程序存儲器類型: ROMless
RAM 容量: 2K x 8
電壓 - 電源 (Vcc/Vdd): 4.5 V ~ 5.5 V
振蕩器型: 內部
工作溫度: -40°C ~ 85°C
封裝/外殼: 132-BQFP 緩沖式
包裝: 托盤
MOTOROLA
MC68332
48
MC68332TS/D
DBcc
Dn, label
16
If condition false, then Dn
1 PC;
if Dn
≠ ( 1), then PC + d PC
DIVS/DIVU
<ea>, Dn
32/16
16 : 16 Destination / Source Destination
(signed or unsigned)
DIVSL/DIVUL
<ea>, Dr : Dq
<ea>, Dq
<ea>, Dr : Dq
64/32
32 : 32
32/32
32
32/32
32 : 32
Destination / Source
Destination
(signed or unsigned)
EOR
Dn, <ea>
8, 16, 32
Source
⊕ Destination Destination
EORI
# <data>, <ea>
8, 16, 32
Data
⊕ Destination Destination
EORI to CCR
# <data>, CCR
8
Source
⊕ CCR CCR
EORI to SR1
# <data>, SR
16
Source
⊕ SR SR
EXG
Rn, Rn
32
Rn
Rn
EXT
Dn
8
16
16
32
Sign extended Destination
Destination
EXTB
Dn
8
32
Sign extended Destination
Destination
ILLEGAL
none
SSP
2 SSP; vector offset (SSP);
SSP
4 SSP; PC (SSP);
SSP
2 SSP; SR (SSP);
Illegal instruction vector address
PC
JMP
none
Destination
PC
JSR
none
SP
4 SP; PC (SP); destination PC
LEA
<ea>, An
32
<ea>
An
LINK
An, # d
16, 32
SP
4 SP, An (SP); SP An, SP + d SP
LPSTOP1
# <data>
16
Data
SR; interrupt mask EBI; STOP
LSL
Dn, Dn
# <data>, Dn
8, 16, 32
16
LSR
Dn, Dn
#<data>, Dn
8, 16, 32
16
MOVE
<ea>, <ea>
8, 16, 32
Source
Destination
MOVEA
<ea>, An
16, 32
32
Source
Destination
MOVEA1
USP, An
An, USP
32
USP
An
An
USP
MOVE from CCR
CCR, <ea>
16
CCR
Destination
MOVE to CCR
<ea>, CCR
16
Source
CCR
MOVE from SR1
SR, <ea>
16
SR
Destination
MOVE to SR1
<ea>, SR
16
Source
SR
MOVE USP1
USP, An
An, USP
32
USP
An
An
USP
MOVEC1
Rc, Rn
Rn, Rc
32
Rc
Rn
Rn
Rc
MOVEM
list, <ea>
<ea>, list
16, 32
32
Listed registers
Destination
Source
Listed registers
MOVEP
Dn, (d16, An)
(d16, An), Dn
16, 32
Dn [31 : 24]
(An + d); Dn [23 : 16] (An + d + 2);
Dn [15 : 8]
(An + d + 4); Dn [7 : 0] (An + d + 6)
(An
+ d) Dn [31 : 24]; (An + d + 2) Dn [23 : 16];
(An
+ d + 4) Dn [15 : 8]; (An + d + 6) Dn [7 : 0]
MOVEQ
#<data>, Dn
8
32
Immediate data
Destination
Table 20 Instruction Set Summary(Continued)
Instruction
Syntax
Operand Size
Operation
X/C
0
X/C
0
F
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Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
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