參數(shù)資料
型號(hào): MC68332ACFC16B1
廠商: Freescale Semiconductor
文件頁數(shù): 51/88頁
文件大?。?/td> 0K
描述: IC MCU 32BIT 16MHZ 132-PQFP
標(biāo)準(zhǔn)包裝: 180
系列: M683xx
核心處理器: CPU32
芯體尺寸: 32-位
速度: 16MHz
連通性: EBI/EMI,SCI,SPI,UART/USART
外圍設(shè)備: POR,PWM,WDT
輸入/輸出數(shù): 15
程序存儲(chǔ)器類型: ROMless
RAM 容量: 2K x 8
電壓 - 電源 (Vcc/Vdd): 4.5 V ~ 5.5 V
振蕩器型: 內(nèi)部
工作溫度: -40°C ~ 85°C
封裝/外殼: 132-BQFP 緩沖式
包裝: 托盤
MC68332
MOTOROLA
MC68332TS/D
55
lation parameter. From 1 to 255 period measurements can be made and summed with the previous
measurement(s) before the TPU interrupts the CPU, allowing instantaneous or average frequency mea-
surement, and the latest complete accumulation (over the programmed number of periods).
The pulse width (high-time portion) of an input signal can be measured (up to 24 bits) and added to a
previous measurement over a programmable number of periods (1 to 255). This provides an instanta-
neous or average pulse-width measurement capability, allowing the latest complete accumulation (over
the specified number of periods) to always be available in a parameter. By using the output compare
function in conjunction with PPWA, an output signal can be generated that is proportional to a specified
input signal. The ratio of the input and output frequency is programmable. One or more output signals
with different frequencies, yet proportional and synchronized to a single input signal, can be generated
on separate channels.
5.1.11 Quadrature Decode (QDEC)
The quadrature decode function uses two channels to decode a pair of out-of-phase signals in order to
present the CPU with directional information and a position value. It is particularly suitable for use with
slotted encoders employed in motor control. The function derives full resolution from the encoder sig-
nals and provides a 16-bit position counter with rollover/under indication via an interrupt.
The counter in parameter RAM is updated when a valid transition is detected on either one of the two
inputs. The counter is incremented or decremented depending on the lead/lag relationship of the two
signals at the time of servicing the transition. The user can read or write the counter at any time. The
counter is free running, overflowing to $0000 or underflowing to $FFFF depending on direction. The
QDEC function also provides a time stamp referenced to TCR1 for every valid signal edge and the abil-
ity for the host CPU to obtain the latest TCR1 value. This feature allows position interpolation by the
host CPU between counts at very slow count rates.
5.2 MC68332G Time Functions
The following paragraphs describe factory-programmed time functions implemented in the motion-con-
trol microcode ROM. A complete description of the functions is beyond the scope of this summary. Re-
fer to
Using the TPU Function Library and TPU Emulation Mode (TPUPN00/D) for more information
about specific functions.
5.2.1 Table Stepper Motor (TSM)
The TSM function provides for acceleration and deceleration control of a stepper motor with a program-
mable number of step rates up to 58. TSM uses a table in PRAM, rather than an algorithm, to define
the stepper motor acceleration profile, allowing the user to fully define the profile. In addition, a slew rate
parameter allows fine control of the terminal running speed of the motor independent of the acceleration
table. The CPU need only write a desired position, and the TPU accelerates, slews, and decelerates
the motor to the required position. Full and half step support is provided for two-phase motors. In addi-
tion, a slew rate parameter allows fine control of the terminal running speed of the motor independent
of the acceleration table.
5.2.2 New Input Capture/Transition Counter (NITC)
Any channel of the TPU can capture the value of a specified TCR or any specified location in parameter
RAM upon the occurrence of each transition or specified number of transitions, and then generate an
interrupt request to notify the bus master. The times of the most recent two transitions are maintained
in parameter RAM. A channel can perform input captures continually, or a channel can detect a single
transition or specified number of transitions, ceasing channel activity until reinitialization. After each
transition or specified number of transitions, the channel can generate a link to other channels.
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Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
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