參數(shù)資料
型號: MC68332MFV16
廠商: MOTOROLA INC
元件分類: 微控制器/微處理器
英文描述: 32-Bit Modular Microcontroller
中文描述: 32-BIT, 16.78 MHz, MICROCONTROLLER, PQFP144
封裝: QFP-144
文件頁數(shù): 62/88頁
文件大?。?/td> 446K
代理商: MC68332MFV16
MOTOROLA
62
MC68332
MC68332TS/D
CH[15:0] — Encoded Host Sequence
The host sequence field selects the mode of operation for the time function selected on a given channel.
The meaning of the host sequence bits depends on the time function specified.
CH[15:0] — Encoded Type of Host Service
The host service request field selects the type of host service request for the time function selected on
a given channel. The meaning of the host service request bits depends on the time function specified.
A host service request field cleared to %00 signals the host that service is completed by the microengine
on that channel. The host can request service on a channel by writing the corresponding host service
request field to one of three nonzero states. The CPU should monitor the host service request register
until the TPU clears the service request to %00 before the CPU changes any parameters or issues a
new service request to the channel.
CH[15:0] — Encoded One of Three Channel Priority Levels
HSQR0
— Host Sequence Register 0
$YFFE14
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
CH 15
CH 14
CH 13
CH 12
CH 11
CH 10
CH 9
CH 8
RESET:
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
HSQR1
— Host Sequence Register 1
$YFFE16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
CH 7
CH 6
CH 5
CH 4
CH 3
CH 2
CH 1
CH 0
RESET:
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
HSRR0
— Host Service Request Register 0
$YFFE18
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
CH 15
CH 14
CH 13
CH 12
CH 11
CH 10
CH 9
CH 8
RESET:
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
HSRR1
— Host Service Request Register 1
$YFFE1A
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
CH 7
CH 6
CH 5
CH 4
CH 3
CH 2
CH 1
CH 0
RESET:
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
CPR0
— Channel Priority Register 0
$YFFE1C
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
CH 15
CH 14
CH13
CH 12
CH 11
CH 10
CH 9
CH 8
RESET:
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
CPR1
— Channel Priority Register 1
$YFFE1E
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
CH 7
CH 6
CH 5
CH 4
CH 3
CH 2
CH 1
CH 0
RESET:
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
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