9- 6
M68000 8-/16-/32-BIT MICROPROCESSORS USER'S MANUAL
MOTOROLA
9.4 IMMEDIATE INSTRUCTION EXECUTION TIMES
The numbers of clock periods shown in Table 9-8 include the times to fetch immediate
operands, perform the operations, store the results, and read the next operation. The total
number of clock periods, the number of read cycles, and the number of write cycles are
shown in the previously described format. The number of clock periods, the number of
read cycles, and the number of write cycles, respectively, must be added to those of the
effective address calculation where indicated by a plus sign (+).
In Tables 9-8, the following notation applies:
#
— Immediate operand
Dn — Data register operand
An — Address register operand
M
— Memory operand
Table 9-8. Immediate Instruction Execution Times
Instruction
Size
op #, Dn
op #, An
op #, M
ADDI
Byte, Word
8(2/0)
—12(2/1)+
Long
14(3/0)
—20(3/2)+
ADDQ
Byte, Word
4(1/0)
4(1/0)*
8(1/2)+
Long
8(1/0)
8(1/1)
12(1/2)+
ANDI
Byte, Word
8(2/0)
—12(2/1)+
Long
14(3/0)
—20(3/1)+
CMPI
Byte, Word
8(2/0)
—8(2/0)+
Long
12(3/0)
—12(3/0)+
EORI
Byte, Word
8(2/0)
—12(2/1)+
Long
14(3/0)
—20(3/2)+
MOVEQ
Long
4(1/0)
——
ORI
Byte, Word
8(2/0)
—12(2/1)+
Long
14(3/0)
—20(3/2)+
SUBI
Byte, Word
8(2/0)
—12(2/1)+
Long
14(3/0)
—20(3/2)+
SUBQ
Byte, Word
4(1/0)
4(1/0)*
8(1/1)+
Long
8(1/0)
12(1/2)+
+Add effective address calculation time.
*Word only.
9.5 SINGLE OPERAND INSTRUCTION EXECUTION TIMES
Tables 9-9, 9-10, and 9-11 list the timing data for the single operand instructions. The total
number of clock periods, the number of read cycles, and the number of write cycles are
shown in the previously described format. The number of clock periods, the number of
read cycles, and the number of write cycles, respectively, must be added to those of the
effective address calculation where indicated by a plus sign (+).
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Freescale Semiconductor, Inc.
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