參數(shù)資料
型號： MC68HC05E5P
廠商： FREESCALE SEMICONDUCTOR INC
元件分類： 微控制器/微處理器
英文描述： 8-BIT, MROM, 2.1 MHz, MICROCONTROLLER, PDIP28
封裝： PLASTIC, DIP-28
文件頁數(shù)： 110/140頁
文件大?。?/td> 847K
代理商： MC68HC05E5P
Motorola Bus (M Bus) Interface
M-Bus Interface Features
MC68HC05E5 — Rev. 1.0
General Release Specification
MOTOROLA
Motorola Bus (M Bus) Interface
71
NON-DISCLOSURE
AGREEMENT
REQUIRED
11.3 M-Bus Interface Features
Features of the M-bus interface include:
Fully Compatible with I2C Bus Standard
Multimaster Operation
Software Programmable for 1of 32 Different Serial Clock
Frequencies
Software Selectable Acknowledge Bit
Interrupt Driven Byte-by-Byte Data Transfer
Arbitration Lost Driven Interrupt with Automatic Mode Switching
from Master to Slave
Calling Address Identification Interrupt
Generate/Detect the Start or Stop Signal
Repeated Start Signal Generation
Generate/Recognize the Acknowledge Bit
Bus Busy Detection
11.4 M-Bus System Configuration
The M-bus system uses a serial data line (SDA) and a serial clock line
(SCL) for data transfer. All devices connected to it must have open-drain
or open-collector outputs and the logical AND function is performed on
both lines by two pullup resistors.
11.5 M-Bus Protocol
Normally, a standard communication is composed of four parts: start
signal, slave address transmission, data transfer, and stop signal. These
are described briefly in the following subsections and illustrated in
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Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
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