參數(shù)資料
型號: MC68HC05E6MFB
廠商: FREESCALE SEMICONDUCTOR INC
元件分類: 微控制器/微處理器
英文描述: 8-BIT, MROM, 2.1 MHz, MICROCONTROLLER, PQFP44
封裝: PLASTIC, QFP-44
文件頁數(shù): 77/140頁
文件大?。?/td> 1584K
代理商: MC68HC05E6MFB
Input/Output Ports
Port D
MC68HC05E6 — Rev. 1.0
Input/Output Ports
7-ports
Port D
Port D is an 8-bit bidirectional port which does not share any of its pins
with other subsystems. Port D comprises a data register (PORTD), a
data direction register (DDRD) and a configuration register (CONFD).
The behaviour of the port D I/O pins is determined by the configuration
of the DDRD and the CONFD registers as shown in Table 6. During
power-on or reset, all port D registers are cleared, thereby returning the
port pins to normal inputs with pull-up resistors.
NOTE:
PD0–PD7 are not available in the 28-pin package.
NOTE:
Due to an internal clamp diode, the pins cannot be pulled higher than
VDD, even when configured as open-drain outputs, that is, maximum
ratings for input voltage still apply to open drain outputs.
Port G
Port G is a 4-bit input-only port which shares all of its pins with the A/D
converter. When the A/D converter is enabled, PG0–PG3 read the four
analog inputs. Port G can be read at any time, however reading the port
during an A/D conversion sequence may inject noise on the analog
inputs, resulting in reduced accuracy of the conversion. Because port G
is an input-only port, there is no data direction register associated with it.
NOTE:
PG1–PG3 are not available in the 28-pin package, therefore the A/D
converter has only one input channel.
Table 6 Port D I/O pin congurations
DDRD CONFD
Function
0
Input with pull-up
0
1
Input without pull-up
1
0
Push-pull output
1
Open-drain output
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Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
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