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參數(shù)資料
| 型號： | MC68HC05E6MFB |
| 廠商： | FREESCALE SEMICONDUCTOR INC |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 8-BIT, MROM, 2.1 MHz, MICROCONTROLLER, PQFP44 |
| 封裝： | PLASTIC, QFP-44 |
| 文件頁數(shù)： | 91/140頁 |
| 文件大?。?/td> | 1584K |
| 代理商： | MC68HC05E6MFB |
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Programmable Timer
MC68HC05E6 — Rev. 1.0
Programmable Timer
Counter high
register, Counter
low register,
Alternate counter
high register,
Alternate counter
low register
The double-byte, free-running counter can be read from either of two
locations, the counter register at $18 – $19 or the alternate counter
register at $1A – $1B. A read from only the less significant byte (LSB) of
the free-running counter, $19 or $1B, receives the count value at the
time of the read. If a read of the free-running counter or alternate counter
register first addresses the more significant byte (MSB), $18 or $1A, the
LSB is transferred to a buffer. This buffer value remains fixed after the
first MSB read, even if the user reads the MSB several times. This buffer
is accessed when reading the free-running counter or alternate counter
register LSB and thus completes a read sequence of the total counter
value. In reading either the free-running counter or alternate counter
register, if the MSB is read, the LSB must also be read to complete the
sequence. If the timer overflow flag (TOF) is set when the counter
register LSB is read, then a read of the TSR will clear the flag.
The alternate counter register differs from the counter register only in
that a read of the LSB does not clear TOF. Therefore, to avoid the
possibility of missing timer overflow interrupts due to clearing of TOF, the
alternate counter register should be used where this is a critical issue.
The free-running counter is set to $FFFC during reset and is always a
read-only register. During a power-on reset, the counter is also preset to
$FFFC and begins running after the oscillator start-up delay. Because
the free-running counter is 16 bits preceded by a fixed divide-by-four
prescaler, the value in the free-running counter repeats every 262144
Address
bit 7
bit 6
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
State
on reset
Timer counter high (TCH)
$0018 (bit 15)
(bit 8) 1111 1111
Timer counter low (TCL)
$0019
1111 1100
Alternate counter high (ACH)
$001A (bit 15)
(bit 8) 1111 1111
Alternate counter low (ACL)
$001B
1111 1100
4-ptimer
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Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
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相關(guān)代理商/技術(shù)參數(shù) |
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