- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄69026 > MC68HC05J3CDW (MOTOROLA INC) 8-BIT, MROM, 2.1 MHz, MICROCONTROLLER, PDSO20 PDF資料下載
參數(shù)資料
| 型號(hào)： | MC68HC05J3CDW |
| 廠商： | MOTOROLA INC |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 8-BIT, MROM, 2.1 MHz, MICROCONTROLLER, PDSO20 |
| 封裝： | SOIC-20 |
| 文件頁數(shù)： | 41/74頁 |
| 文件大?。?/td> | 814K |
| 代理商： | MC68HC05J3CDW |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁當(dāng)前第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁第55頁第56頁第57頁第58頁第59頁第60頁第61頁第62頁第63頁第64頁第65頁第66頁第67頁第68頁第69頁第70頁第71頁第72頁第73頁第74頁
MOTOROLA
6-6
MC68HC05J3
16-BIT PROGRAMMABLE TIMER
6
OCF — Output compare ag
1 (set)
–
A valid output compare has occurred.
0 (clear) –
No output compare has occurred.
This bit is set when the output compare register contents match those of the free-running counter;
an output compare interrupt will be generated, if OCIE is set. OCF is cleared by reading the TSR
and then the output compare low register at $17.
TOF — Timer overow ag
1 (set)
–
Timer overow has occurred.
0 (clear) –
No timer overow has occurred.
This bit is set when the free-running counter overows from $FFFF to $0000; a timer overow interrupt
will occur, if TOIE is set. TOF is cleared by reading the TSR and the counter low register, $19.
When using the timer overow function and reading the free-running counter at random times to
measure an elapsed time, a problem may occur whereby the timer overow ag is unintentionally
cleared if:
1) the timer status register is read or written when TOF is set and
2) the LSB of the free-running counter is read, but not for the purpose of
servicing the ag.
Reading the alternate counter register instead of the counter register will avoid this potential
problem.
6.2.3
Input capture function
‘Input capture’ is a technique whereby an external signal (connected to the TCAP pin) is used to
trigger a read of the free-running counter. In this way it is possible to relate the timing of an external
signal to the internal counter value, and hence to elapsed time.
6.2.4
Input capture high register
Input capture low register
The two 8-bit registers that make up the 16-bit input capture register are read-only, and are used
to latch the value of the free-running counter after the input capture edge detector senses a valid
Address
bit 7
bit 6
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
State
on reset
Input capture high (ICH)
$0014
(bit 15)
(bit 8)
Undened
Input capture low (ICL)
$0015
Undened
TPG
43
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| MC68HC05J3P | 8-BIT, MROM, 2.1 MHz, MICROCONTROLLER, PDIP20 |
| MC68HC05J3DW | 8-BIT, MROM, 2.1 MHz, MICROCONTROLLER, PDSO20 |
| MC68HC05J3CP | 8-BIT, MROM, 2.1 MHz, MICROCONTROLLER, PDIP20 |
| MC68HC05J3DW | 8-BIT, MROM, 2.1 MHz, MICROCONTROLLER, PDSO20 |
| MC68HC05J3CDW | 8-BIT, MROM, 2.1 MHz, MICROCONTROLLER, PDSO20 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MC68HC05J3CP | 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:High-density Complementary Metal Oxide Semiconductor (HCMOS) Microcomputer Unit |
| MC68HC05J3DW | 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:High-density Complementary Metal Oxide Semiconductor (HCMOS) Microcomputer Unit |
| MC68HC05J3P | 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:High-density Complementary Metal Oxide Semiconductor (HCMOS) Microcomputer Unit |
| MC68HC05J5A | 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:8-bit microcontroller units |
| MC68HC05J5ADW | 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:8-bit microcontroller units |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。