參數(shù)資料
型號: MC68HC05J3DW
廠商: MOTOROLA INC
元件分類: 微控制器/微處理器
英文描述: 8-BIT, MROM, 2.1 MHz, MICROCONTROLLER, PDSO20
封裝: SOIC-20
文件頁數(shù): 26/74頁
文件大?。?/td> 814K
代理商: MC68HC05J3DW
MOTOROLA
4-4
MC68HC05J3
INPUT/OUTPUT PORTS
4
4.4
Port registers
The following sections explain in detail the individual bits in the data and control registers
associated with the ports.
4.4.1
Port A data register (PORTA)
Each bit can be congured as input or output via the corresponding data direction bit in the port
A data direction register (DDRA).
The state of the bits in the port data register following reset is undened.
4.4.2
Port B data register (PORTB)
In addition to the normal port functions, port B is equipped with a keyboard interrupt capability as
described in Section 4.3. Two of the port pins (PB4 and PB5) are shared with the TCMP and TCAP
pins respectively. These functions are controlled using the port B conguration register.
4.4.3
Port B conguration register (CONFB)
Reset clears this register, thus returning all port B pins to normal I/O lines.
KSF — Keyboard interrupt status ag
1 (set)
Keyboard interrupt has occurred.
0 (clear) –
No keyboard interrupt has occurred.
Address
bit 7
bit 6
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
State
on reset
Port A data (PORTA)
$0000
Undened
Address
bit 7
bit 6
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
State
on reset
Port B data (PORTB)
$0001
0
Undened
Address
bit 7
bit 6
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
State
on reset
Port B conguration (CONFB)
$0007
KSF
KIE
TCAP
TCMP
0
0000 0000
TPG
29
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