參數(shù)資料
型號(hào): MC68HC05J3DW
廠商: MOTOROLA INC
元件分類: 微控制器/微處理器
英文描述: 8-BIT, MROM, 2.1 MHz, MICROCONTROLLER, PDSO20
封裝: SOIC-20
文件頁(yè)數(shù): 57/74頁(yè)
文件大?。?/td> 814K
代理商: MC68HC05J3DW
MOTOROLA
8-2
MC68HC05J3
CPU CORE AND INSTRUCTION SET
8
8.1.1
Accumulator (A)
The accumulator is a general purpose 8-bit register used to hold operands and results of
arithmetic calculations or data manipulations.
8.1.2
Index register (X)
The index register is an 8-bit register, which can contain the indexed addressing value used to
create an effective address. The index register may also be used as a temporary storage area.
8.1.3
Program counter (PC)
The program counter is a 16-bit register, which contains the address of the next byte to be fetched.
8.1.4
Stack pointer (SP)
The stack pointer is a 16-bit register, which contains the address of the next free location on the
stack. During an MCU reset or the reset stack pointer (RSP) instruction, the stack pointer is set to
location $00FF. The stack pointer is then decremented as data is pushed onto the stack and
incremented as data is pulled from the stack.
When accessing memory, the ten most signicant bits are permanently set to 0000000011. These
ten bits are appended to the six least signicant register bits to produce an address within the
range of $00C0 to $00FF. Subroutines and interrupts may use up to 64 (decimal) locations. If 64
locations are exceeded, the stack pointer wraps around and overwrites the previously stored
information. A subroutine call occupies two locations on the stack; an interrupt uses ve locations.
8.1.5
Condition code register (CCR)
The CCR is a 5-bit register in which four bits are used to indicate the results of the instruction just
executed, and the fth bit indicates whether interrupts are masked. These bits can be individually
tested by a program, and specic actions can be taken as a result of their state. Each bit is
explained in the following paragraphs.
TPG
57
相關(guān)PDF資料
PDF描述
MC68HC05J3CP 8-BIT, MROM, 2.1 MHz, MICROCONTROLLER, PDIP20
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