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| 型號(hào)： | MC68HC05J3P |
| 廠商： | MOTOROLA INC |
| 元件分類(lèi)： | 微控制器/微處理器 |
| 英文描述： | 8-BIT, MROM, 2.1 MHz, MICROCONTROLLER, PDIP20 |
| 封裝： | PLASTIC, DIP-20 |
| 文件頁(yè)數(shù)： | 73/74頁(yè) |
| 文件大?。?/td> | 814K |
| 代理商： | MC68HC05J3P |
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External Interrupt (IRQ)
IRQ Status and Control Register
MC68HC08GP8A
Data Sheet
MOTOROLA
External Interrupt (IRQ)
91
7.6 IRQ Status and Control Register
The IRQ status and control register (INTSCR) controls and monitors operation of
the IRQ module. The INTSCR:
Shows the state of the IRQ flag
Clears the IRQ latch
Masks IRQ interrupt request
Controls triggering sensitivity of the IRQ interrupt pin
IRQF — IRQ Flag Bit
This read-only status bit is high when the IRQ interrupt is pending.
1 = IRQ interrupt pending
0 = IRQ interrupt not pending
ACK — IRQ Interrupt Request Acknowledge Bit
Writing a logic 1 to this write-only bit clears the IRQ latch. ACK always reads as
logic 0. Reset clears ACK.
IMASK — IRQ Interrupt Mask Bit
Writing a logic 1 to this read/write bit disables IRQ interrupt requests. Reset
clears IMASK.
1 = IRQ interrupt requests disabled
0 = IRQ interrupt requests enabled
MODE — IRQ Edge/Level Select Bit
This read/write bit controls the triggering sensitivity of the IRQ pin. Reset clears
MODE.
1 = IRQ interrupt requests on falling edges and low levels
0 = IRQ interrupt requests on falling edges only
Address:
$001D
Bit 7
654321
Bit 0
Read:
IRQF
0
IMASK
MODE
Write:
ACK
Reset:
00000000
= Unimplemented
Figure 7-4. IRQ Status and Control Register (INTSCR)
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Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
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