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| 型號： | MC68HC05J5CJDW |
| 廠商： | MOTOROLA INC |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 8-BIT, MROM, 2.1 MHz, MICROCONTROLLER, PDSO16 |
| 封裝： | SOIC-16 |
| 文件頁數(shù)： | 53/69頁 |
| 文件大?。?/td> | 394K |
| 代理商： | MC68HC05J5CJDW |
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December 11, 1996
GENERAL RELEASE SPECIFICATION
MC68HC05J5
INSTRUCTION SET
MOTOROLA
REV 1.1
9-3
9.4
BIT MANIPULATION INSTRUCTIONS
The MCU is capable of setting or clearing any read/write bit which resides in the
rst 256 bytes of the memory space where all port registers, module registers,
and part or all of on-chip RAM reside. An additional feature allows the software to
test and branch on the state of any bit within these 256 locations. The bit set, bit
clear, and bit test and branch functions are each implemented with a single
instruction. For test and branch instructions, the value of the bit tested is also
placed in the carry bit of the condition code register. The bit set and bit clear
instructions are also read-modify-write instructions and should not be used to
manipulate write-only locations. Refer to the following list for bit manipulation
instructions.
9.5
CONTROL INSTRUCTIONS
These instructions are register reference instructions and are used to control pro-
cessor operation during program execution. Refer to the following list for control
instructions.
9.6
ADDRESSING MODES
The MCU uses ten different addressing modes to provide the programmer with an
opportunity to optimize the code for all situations. The various indexed addressing
modes make it possible to locate data tables, code conversion tables, and scaling
Function
Set Bit n
Clear Bit n
Mnemonic
BSET n (n = 0. . .7)
BCLR n (n = 0. . .7)
Branch if Bit n is Set
Branch if bit n is Clear
BRSET n (n = 0. . .7)
BRCLR n (n = 0. . .7)
Function
Transfer A to X
Transfer X to A
Set Carry Bit
Clear Carry Bit
Mnemonic
TAX
TXA
SEC
CLC
Set Interrupt Mask Bit
SEI
Clear Interrupt Mask Bit
CLI
Software Interrupt
SWI
Return from Subroutine
RTS
Return from Interrupt
RTI
Reset Stack Pointer
RSP
No-Operation
NOP
Wait
WAIT
Stop
STOP
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