參數(shù)資料
型號(hào): MC68HC05K3DWR2
廠商: FREESCALE SEMICONDUCTOR INC
元件分類: 微控制器/微處理器
英文描述: 8-BIT, MROM, 2 MHz, MICROCONTROLLER, PDSO16
封裝: SOIC-16
文件頁數(shù): 75/132頁
文件大?。?/td> 1188K
代理商: MC68HC05K3DWR2
Interrupts
Hardware Interrupts
MC68HC05K3 — Revision 4.0
Technical Data
MOTOROLA
Interrupts
47
NOTE:
The BIH and BIL instructions apply only to the level on the IRQ pin itself
and not to the output of the logic OR gate with PA0–PA3 pins. The state
of the individual port A pins can be checked by reading the appropriate
port A pins as inputs.
NOTE:
If port A interrupts are enabled, the state of PA0–PA3 pins may cause
an IRQ interrupt regardless of whether these pins are configured as
4.6.4 Timer Interrupt (TIMER)
The timer interrupt is generated by the 8-bit timer when either a timer
overflow or a real-time interrupt has occurred, as described in
Section 8. 8-Bit Timer. The interrupt flags and enable bits for the timer
interrupts are in the timer status/control register (TSCR) located at
$0008. The I bit in the CCR must be clear for the timer interrupt to be
enabled. Either of these two interrupts vector to the same interrupt
service routine located at the address specified by the contents of
memory locations $03F8 and $03F9.
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