參數(shù)資料
型號: MC68HC05P18ADWE
廠商: FREESCALE SEMICONDUCTOR INC
元件分類: 微控制器/微處理器
英文描述: 8-BIT, MROM, 2.1 MHz, MICROCONTROLLER, PDSO28
封裝: SOIC-28
文件頁數(shù): 72/130頁
文件大小: 1310K
代理商: MC68HC05P18ADWE
NON-DISCLOSURE
AGREEMENT
REQUIRED
Resets
Technical Data
MC68HC05P18A
Resets
Figure 5-1. Reset Block Diagram
5.3 External Reset (RESET)
The RESET input is the only external reset and is connected to an
internal Schmitt trigger. The external reset occurs whenever the RESET
input is driven below the lower threshold and remains in reset until the
RESET pin rises above the upper threshold. The upper and lower
5.4 Internal Resets
The three internally generated resets are:
Initial power-on reset (POR)
Computer operating properly (COP) watchdog timer
Low-voltage reset (LVR)
CPU
LATCH
RESET
COP WATCHDOG
(COPR)
RST
OSC
DATA
ADDRESS
PH2
TO OTHER
PERIPHERALS
S
LOW-VOLTAGE
RESET (LVR)
VDD
TO IRQ
LOGIC
POWER-ON RESET
(POR)
VDD
PH2
CLOCKED
ONE-SHOT
PULSE WIDTH = 4 X E-CLK
D
IRQ
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Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
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