參數(shù)資料
型號(hào)： MC68HC05P4ADWR3
廠商： FREESCALE SEMICONDUCTOR INC
元件分類： 微控制器/微處理器
英文描述： 8-BIT, MROM, 2.1 MHz, MICROCONTROLLER, PDSO28
封裝： PLASTIC, SOIC-28
文件頁(yè)數(shù)： 62/102頁(yè)
文件大?。?/td> 930K
代理商： MC68HC05P4ADWR3
Advance Information
MC68HC05P4A — Rev. 6.0
62
Timer
MOTOROLA
Timer
8.6 Timer Control Register
The timer control register (TCR) is a read/write register containing five
control bits. Three bits control interrupts associated with the timer status
register flags ICF, OCF, and TOF.
ICIE — Input Capture Interrupt Enable Bit
1 = Interrupt enabled
0 = Interrupt disabled
OCIE — Output Compare Interrupt Enable Bit
1 = Interrupt enabled
0 = Interrupt disabled
TOIE — Timer Overflow Interrupt Enable Bit
1 = Interrupt enabled
0 = Interrupt disabled
IEDG — Input Edge Bit
Value of input edge determines which level transition on TCAP pin will
trigger free-running counter transfer to the input capture register.
Reset does not affect the IEDG bit.
1 = Positive edge
0 = Negative edge
OLVL — Output Level Bit
Value of output level is clocked into output level register by the next
successful output compare and will appear on the TCMP pin.
1 = High output
0 = Low output
Address:
$0012
Bit 7
654321
Bit 0
Read:
ICIE
OCIE
TOIE
000
IEDG
OLVL
Write:
Reset:
00000000
= Unimplemented
Figure 8-2. Timer Control Register (TCR)
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參數(shù)描述
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MC68HC05P6_1 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:HCMOS MICROCONTROLLER UNIT
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