參數資料
型號: MC68HC05V7FNR2
廠商: MOTOROLA INC
元件分類: 微控制器/微處理器
英文描述: 8-BIT, MROM, 2.1 MHz, MICROCONTROLLER, PQCC68
封裝: PLASTIC, LCC-68
文件頁數: 12/170頁
文件大小: 589K
代理商: MC68HC05V7FNR2
SECTION 15: MESSAGE DATA LINK CONTROLLER
MOTOROLA
Page 95
MC68HC05V7 Specification Rev. 1.0
15.2
MDLC CPU INTERFACE
15.2.1
OUTLINE
The CPU Interface provides the interface between the CPU and the MDLC. It consists of 4
user registers. A full description of each register follows:
Physical Interface
To CPU
Protocol Handler
MUX Interface
CPU Interface
Rx/Tx
Buffers
To J1850 Bus
MDLC
Figure 15-2:
MDLC User Registers
Name
Addr
MCR
MSR
MTCR
MRSR
$000E
$000F
$0010
$0011
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