參數(shù)資料
型號(hào): MC68HC05X4CDW
廠商: MOTOROLA INC
元件分類(lèi): 微控制器/微處理器
英文描述: HCMOS Microcontroller Unit
中文描述: 8-BIT, MROM, 2.2 MHz, MICROCONTROLLER, PDSO28
封裝: PLASTIC, SOIC-28
文件頁(yè)數(shù): 145/156頁(yè)
文件大?。?/td> 926K
代理商: MC68HC05X4CDW
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Glossary
MC68HC0X4 Rev 1.0
MOTOROLA
Glossary
145
subroutine
— A sequence of instructions to be used more than once in the course of a program.
The last instruction in a subroutine is a return from subroutine (RTS) instruction. At each
place in the main program where the subroutine instructions are needed, a jump or branch
to subroutine (JSR or BSR) instruction is used to call the subroutine. The CPU leaves the
flow of the main program to execute the instructions in the subroutine. When the RTS
instruction is executed, the CPU returns to the main program where it left off.
synchronous
— Refers to logic circuits and operations that are synchronized by a common
reference signal.
TIM
— See "timer interface module (TIM)."
timer interface module (TIM)
— A module used to relate events in a system to a point in time.
timer
— A module used to relate events in a system to a point in time.
toggle
— To change the state of an output from a logic 0 to a logic 1 or from a logic 1 to a logic 0.
tracking mode
— Mode of low-jitter PLL operation during which the PLL is locked on a
frequency. Also see "acquisition mode."
two’s complement
— A means of performing binary subtraction using addition techniques. The
most significant bit of a two’s complement number indicates the sign of the number (1
indicates negative). The two’s complement negative of a number is obtained by inverting
each bit in the number and then adding 1 to the result.
unbuffered
— Utilizes only one register for data; new data overwrites current data.
unimplemented memory location
— A memory location that is not used. Writing to an
unimplemented location has no effect. Reading an unimplemented location returns an
unpredictable value. Executing an opcode at an unimplemented location causes an illegal
address reset.
V
—The overflow bit in the condition code register of the CPU08. The CPU08 sets the V bit when
a two's complement overflow occurs. The signed branch instructions BGT, BGE, BLE,
and BLT use the overflow bit.
variable
— A value that changes during the course of program execution.
VCO
— See "voltage-controlled oscillator."
F
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
n
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