參數(shù)資料
型號(hào): MC68HC05X4CDW
廠商: MOTOROLA INC
元件分類: 微控制器/微處理器
英文描述: HCMOS Microcontroller Unit
中文描述: 8-BIT, MROM, 2.2 MHz, MICROCONTROLLER, PDSO28
封裝: PLASTIC, SOIC-28
文件頁數(shù): 80/156頁
文件大?。?/td> 926K
代理商: MC68HC05X4CDW
Motorola CAN
MC68HC05X4
80
Motorola CAN
MOTOROLA
SLEEP — Go to sleep
When the SLEEP bit is set during a non synchronous state, an
immediate wake-up wil be generated by the MCAN module. (See RR
bit description for more details.)
1 = Sleep – The MCAN will go into sleep mode, as long as there is
no activity on the bus. Otherwise the MCAN will issue a
wake-up interrupt.
0 = Wake-up – The MCAN will function normally. If SLEEP is
cleared by the CPU then the MCAN will waken up, but will not
issue a wake-up interrupt.
NOTE:
If SLEEP is set during the reception or transmission of a message, the
MCAN will generate an immediate wake-up interrupt. (This allows for a
more orthogonal software mplementation on the CPU.) This will have no
effect on the transfer layer, i.e. no message will be lost or corrupted.
The CAF flag in the port configuration register indicates whether or not
sleep mode was entered successfully.
A node that was sleeping and has been awakened by bus activity will not
be able to receive any messages until its oscillator has started and it has
found a valid end of frame sequence (11 recessive bits). The designer
must take this into consideration when planning to use the sleep
command.
COS — Clear overrun status
1 = This clears the read-only data overrun status bit in the CSTAT
register (see
MCAN status register (CSTAT)
). It may be
written at the same time as RRB.
0 = No action.
12-mcan
F
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
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