參數(shù)資料
型號: MC68HC11D3CFN2
廠商: FREESCALE SEMICONDUCTOR INC
元件分類: 微控制器/微處理器
英文描述: 8-BIT, MROM, 2 MHz, MICROCONTROLLER, PQCC44
封裝: PLASTIC, LCC-44
文件頁數(shù): 39/138頁
文件大?。?/td> 1047K
代理商: MC68HC11D3CFN2
MC68L11D0 Electrical Characteristics
MC68HC711D3 Data Sheet, Rev. 2.1
Freescale Semiconductor
133
B.2.3 Control Timing
B.2.4 Peripheral Port Timing
Characteristic(1)
1. VDD = 3.0 Vdc to 5.5 Vdc, VSS = 0 Vdc, TA = TL to TH. All timing is shown with respect to 20% VDD and 70% VDD, unless
otherwise noted.
Symbol
1.0 MHz
2.0 MHz
Unit
Min
Max
Min
Max
Frequency of operation
fO
dc
1.0
dc
2.0
MHz
E-clock period
tcyc
1000
500
ns
Crystal frequency
fXTAL
4.0
8.0
MHz
External oscillator frequency
4 fO
dc
4.0
dc
8.0
MHz
Processor control setup time
tPCSU = 1/4 tcyc + 50 ns
tPCSU
325
200
ns
Reset input pulse width(2)
To guarantee external reset vector
Minimum input time can be preempted by internal reset
2. Reset is recognized during the first clock cycle it is held low. Internal circuitry then drives the pin low for four clock cycles,
releases the pin, and samples the pin level two cycles later to determine the source of the interrupt. Refer to Chapter 4
PWRSTL
8
1
8
1
tcyc
Interrupt pulse width, PWIRQ = tcyc + 20 ns
IRQ edge-sensitive mode
PWIRQ
1020
520
ns
Wait recovery startup time
tWRS
—4
4
tcyc
Timer pulse width PWTIM = tcyc + 20 ns
Input capture pulse accumulator input
PWTIM
1020
520
ns
Characteristic(1)
1. VDD = 3.0 Vd to 5.5 Vdc, VSS = 0 Vdc, TA = TL to TH. All timing is shown with respect to 20% VDD and 70% VDD, unless
otherwise noted.
Symbol
1.0 MHz
2.0 MHz
Unit
Min
Max
Min
Max
Frequency of operation (E-clock frequency)
fO
dc
1.0
dc
2.0
MHz
E-clock period
tcyc
1000
500
ns
Peripheral data setup time(2)
MCU read of ports A, B, C, and D
2. Port C and D timing is valid for active drive (CWOM and DWOM bits not set in PIOC and SPCR registers respectively).
tPDSU
100
100
ns
Peripheral data hold time(2)
MCU read of ports A, B, C, and D
tPDH
50
50
ns
Delay time, peripheral data write
MCU write to port A
MCU writes to ports B, C, and D
tPWD = 1/4 tcyc + 150 ns
tPWD
200
350
200
225
ns
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