參數(shù)資料
型號(hào)： MC68HC11F1CFN2R2
廠商： FREESCALE SEMICONDUCTOR INC
元件分類： 微控制器/微處理器
英文描述： 8-BIT, EEPROM, 2 MHz, MICROCONTROLLER, PQCC68
封裝： PLASTIC, LCC-68
文件頁數(shù)： 83/163頁
文件大小： 711K
代理商： MC68HC11F1CFN2R2
MOTOROLA
CENTRAL PROCESSING UNIT
MC68HC11F1
3-2
TECHNICAL DATA
Figure 3-1 Programming Model
3.1.1 Accumulators A, B, and D
Accumulators A and B are general-purpose 8-bit registers that hold operands and re-
sults of arithmetic calculations or data manipulations. For some instructions, these two
accumulators are treated as a single double-byte (16-bit) accumulator called accumu-
lator D. Although most instructions can use accumulators A or B interchangeably, the
following exceptions apply:
The ABX and ABY instructions add the contents of 8-bit accumulator B to the contents
of 16-bit register X or Y, but there are no equivalent instructions that use A instead of B.
The TAP and TPA instructions transfer data from accumulator A to the condition code
register, or from the condition code register to accumulator A, however, there are no
equivalent instructions that use B rather than A.
The decimal adjust accumulator A (DAA) instruction is used after binary-coded deci-
mal (BCD) arithmetic operations, but there is no equivalent BCD instruction to adjust
accumulator B.
CARRY
OVERFLOW
ZERO
NEGATIVE
I INTERRUPT MASK
HALF-CARRY (FROM BIT 3)
X INTERRUPT MASK
STOP DISABLE
CCR
PC
SP
IY
IX
D
S
PROGRAM COUNTER
STACK POINTER
INDEX REGISTER Y
INDEX REGISTER X
DOUBLE ACCUMULATOR D
ACCUMULATOR B
CONDITION CODE REGISTER
X
H
I
N
Z
V
C
70
0
15
0
15
0
15
0
15
0
15
70
ACCUMULATOR A
1
2
3
4
5
6
B
A
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