參數(shù)資料
型號(hào)： MC68HC11F1CFN3R2
廠商： MOTOROLA INC
元件分類： 微控制器/微處理器
英文描述： 8-BIT, EEPROM, 3 MHz, MICROCONTROLLER, PQCC68
封裝： PLASTIC, LCC-68
文件頁數(shù)： 128/174頁
文件大?。?/td> 981K
代理商： MC68HC11F1CFN3R2
MC68HC11F1
OPERATING MODES AND ON-CHIP MEMORY
MOTOROLA
TECHNICAL DATA
4-19
Figure 4-3 Address Map for I/O and Program Chip Selects
4.5.3 General-Purpose Chip Select
The general-purpose chip select (CSGEN) is the most flexible and has the most con-
trol bits. Polarity of the active state, E-valid or address-valid timing, size, starting ad-
dress, and clock delay are all programmable.
A single bit in CSCTL selects a priority between CSGEN and CSPROG. Bits in CSG-
SIZ select between address valid or E-clock valid timing, determine the polarity of the
active state and the address range of CSGEN. The value contained in the CSGADR
register determines the starting address for CSGEN. Depending on the size selected
for CSGEN, some bits in CSGADR will be invalid (don’t cares). Note that CSGEN is
disabled when a size of zero is selected. Refer to Figure 4-4.
$0000
$1000
$FFFF
EXPANDED
MODE
$FE00
FFC0
FFFF
VECTORS
0000
FFFF
E000
C000
8000
x000
x05F
96-BYTE REGISTER
BLOCK
x060
x7FF
I/O CHIP SELECT 1
(CSIO1)
x800
xFFF
I/O CHIP SELECT 2
(CSIO2)
REMAPPABLE TO
4-KBYTE BOUNDARY
$E000
$C000
$8000
PSIZ[A:B] = 0:0
64K
PSIZ[A:B] = 0:1
32K
PSIZ[A:B] = 1:0
16K
PSIZ[A:B] = 1:1
8K
PROGRAM CHIP SELECT
(CSPROG)
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
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