MC68HC11PH8
MOTOROLA
5-13
SERIAL COMMUNICATIONS INTERFACE
5
5.7
Status ags and interrupts
The SCI transmitter has two status ags. These status ags can be read by software (polled) to
tell when certain conditions exist. Alternatively, a local interrupt enable bit can be set to enable
each of these status conditions to generate interrupt requests. Status ags are automatically set
by hardware logic conditions, but must be cleared by software. This provides an interlock
mechanism that enables logic to know when software has noticed the status indication. The
software clearing sequence for these ags is automatic — functions that are normally performed
in response to the status ags also satisfy the conditions of the clearing sequence.
TDRE and TC ags are normally set when the transmitter is rst enabled (TE set to one). The
TDRE ag indicates there is room in the transmit queue to store another data character in the
transmit data register. The TIE bit is the local interrupt mask for TDRE. When TIE is zero, TDRE
must be polled. When TIE and TDRE are one, an interrupt is requested.
The TC ag indicates the transmitter has completed the queue. The TCIE bit is the local interrupt
mask for TC. When TCIE is zero, TC must be polled; when TCIE is one and TC is one, an interrupt
is requested.
Writing a zero to TE requests that the transmitter stop when it can. The transmitter completes any
transmission in progress before shutting down. Only an MCU reset can cause the transmitter to
stop and shut down immediately. If TE is cleared when the transmitter is already idle, the pin
reverts to its general purpose I/O function (synchronized to the bit-rate clock). If anything is being
transmitted when TE is cleared, that character is completed before the pin reverts to general
purpose I/O, but any other characters waiting in the transmit queue are lost. The TC and TDRE
ags are set at the completion of this last character, even though TE has been disabled.
5.7.1
Receiver ags
The SCI receiver has seven status ags, three of which can generate interrupt requests. The
status ags are set by the SCI logic in response to specic conditions in the receiver. These ags
can be read (polled) at any time by software. Refer to
Figure 5-3, which shows SCI interrupt
arbitration.
When an overrun takes place, the new character is lost, and the character that was in its way in
the parallel receive data register (RDR) is undisturbed. RDRF is set when a character has been
received and transferred into the parallel RDR. The OR ag is set instead of RDRF if overrun
occurs. A new character is ready to be transferred into the RDR before a previous character is read
from the RDR.
The NF, FE and PF ags provide additional information about the character in the RDR, but do not
generate interrupt requests.
The receiver active ag (RAF) indicates that the receiver is busy.
The last receiver status ag and interrupt source come from the IDLE ag. The RXD line is idle if it has
constantly been at logic one for a full character time. The IDLE ag is set only after the RXD line has
been busy and becomes idle. This prevents repeated interrupts for the time RXD remains idle.
TPG
103