參數(shù)資料
型號: MC68HC705E6VDWR3
廠商: MOTOROLA INC
元件分類: 微控制器/微處理器
英文描述: 8-BIT, OTPROM, 2.1 MHz, MICROCONTROLLER, PDSO28
封裝: PLASTIC, SOIC-28
文件頁數(shù): 123/140頁
文件大?。?/td> 1141K
代理商: MC68HC705E6VDWR3
Resets and Interrupts
Hardware controlled interrupt sequence
MC68HC05E6 — Rev. 1.0
MOTOROLA
Resets and Interrupts
83
11-resets
Hardware controlled interrupt sequence
The following three functions, reset, STOP and WAIT, are not in the
strictest sense interrupts. However, they are acted upon in a similar
manner. Flowcharts for STOP and WAIT are shown in STOP and WAIT
RESET: A reset condition causes the program to vector to its starting
address, which is contained in memory locations $1FFE (MSB)
and $1FFF (LSB). The I-bit in the condition code register is
also set, to disable interrupts.
STOP:
The STOP instruction places the MCU in its lowest power
consumption mode. In STOP mode, the internal oscillator is
turned off, halting all internal processing including timer (and
COP watchdog timer) operation.
WAIT:
The WAIT instruction places the MCU in a low power
consumption mode, but WAIT mode consumes more power
than STOP mode. All CPU action is suspended, but the core
timer, the 16-bit timer and the A/D converter remain active. An
external, keyboard or LVI interrupt or an interrupt from the core
timer or 16-bit timer, if enabled, will cause the MCU to exit
WAIT mode.
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