參數(shù)資料
型號: MC68HC705J2
廠商: 飛思卡爾半導體(中國)有限公司
英文描述: member of the low-cost
中文描述: 成員低成本
文件頁數(shù): 29/82頁
文件大?。?/td> 583K
代理商: MC68HC705J2
CENTRAL PROCESSOR UNIT
Rev. 2
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4.3.2 WAIT Mode
The WAIT instruction puts the MCU in an intermediate power-consumption mode.
In WAIT mode, the following events occur:
All CPU clocks stop.
The CPU clears the interrupt mask in the condition code register, enabling
external interrupts and timer interrupts.
The WAIT instruction does not affect any other registers or any I/O lines. The timer
and COP timer remain active in WAIT mode.
The following conditions bring the MCU out of WAIT mode:
A timer interrupt. If a real-time interrupt or a timer overflow interrupt occurs
during WAIT mode, the MCU loads the program counter with the contents of
locations $0FF8 and $0FF9, the locations of the vector address of the timer
interrupt service routine.
An external interrupt. An external interrupt automatically loads the program
counter with the contents of locations $0FFA and $0FFB, the locations of the
vector address of the external interrupt service routine.
A COP timer reset. A timeout of the COP timer during WAIT mode resets
the MCU. The programmer can enable real-time interrupts so the MCU can
periodically exit WAIT mode to reset the COP timer.
A reset signal on the RESET pin during WAIT mode resets the MCU.
A COP timer reset or a reset signal on the RESET pin automatically loads the
program counter with the contents of locations $0FFE and $0FFF, the locations of
the vector address of the reset service routine.
Figure 4-3
shows the sequence of events caused by the WAIT instruction.
F
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
n
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