參數(shù)資料
型號: MC68HC705J2
廠商: 飛思卡爾半導(dǎo)體(中國)有限公司
英文描述: member of the low-cost
中文描述: 成員低成本
文件頁數(shù): 33/82頁
文件大小: 583K
代理商: MC68HC705J2
RESETS AND INTERRUPTS
Rev. 2
5-3
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5.2 Interrupts
An interrupt temporarily stops normal processing to process a particular event.
Unlike a reset, an interrupt does not stop the operation of the instruction being
executed. An interrupt takes effect when the current instruction completes its
execution. An interrupt saves the CPU registers on the stack and loads the program
counter with a user-defined interrupt vector address. The following conditions
produce an interrupt:
Timer overflow or real-time interrupt request (timer interrupts)
A logical zero applied to the IRQ pin (external interrupt)
SWI instruction (software interrupt)
The CPU does the following things to begin servicing an interrupt:
Stores the contents of the CPU registers on the stack as shown in
Figure 5-2
Figure 5-2. Interrupt Stacking Order
Sets the interrupt mask to prevent further interrupts
Loads the program counter with the contents of the appropriate interrupt vector
locations:
$0FF8 and $0FF9 (timer interrupt vector)
$0FFA and $0FFB (external interrupt vector)
$0FFC and $0FFD (software interrupt vector)
ACCUMULATOR
CONDITION CODE REGISTER
INDEX REGISTER
PROGRAMCOUNTER LOW
PROGRAMCOUNTER HIGH
7
0
I
R
TOWARD HIGHER ADDRESSES
(HIGHEST STACK ADDRESS IS $00FF)
TOWARD LOWER ADDRESSES
(LOWEST STACK ADDRESS IS $00C0)
UNSTACK
STACK
F
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
n
.
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