參數(shù)資料
型號： MC68HC908JK8CP
廠商： FREESCALE SEMICONDUCTOR INC
元件分類： 微控制器/微處理器
英文描述： 8-BIT, FLASH, 8 MHz, MICROCONTROLLER, PDIP20
封裝： PLASTIC, DIP-20
文件頁數(shù)： 24/56頁
文件大?。?/td> 648K
代理商： MC68HC908JK8CP
MC68HC908JL8SM/D
MC68HC908JL8MC68HC908JK8
TIM Counter Modulo Registers
When the TIM counter reaches the modulo value, the overflow flag (TOF)
becomes set, and the TIM counter resumes counting from $0000 at the next
timer clock. Writing to the high byte (TMODH) inhibits the TOF bit and overflow
interrupts until the low byte (TMODL) is written.
TIM Channel Status
and Control
Registers
CHxF — Channel x Flag Bit
When channel x is an input capture channel, CHxF is set when an active
edge occurs on the channel x pin. When channel x is an output compare
channel, CHxF is set when the value in the TIM counter registers matches
the value in the TIM channel x registers.
Clear CHxF by reading the TIM channel x status and control register with
CHxF set and then writing a logic 0 to CHxF.
1 = Input capture or output compare on channel x
CHxIE — Channel x Interrupt Enable Bit
1 = Channel x CPU interrupt requests enabled
T1MODH: $0023; T2MODH: $0033
Bit 7
654321
Bit 0
Bit15
Bit14
Bit13
Bit12
Bit11
Bit10
Bit9
Bit8
Reset:
11111111
T1MODL: $0024; T2MODL: $0034
Bit 7
654321
Bit 0
Bit7
Bit6
Bit5
Bit4
Bit3
Bit2
Bit1
Bit0
Reset:
11111111
Figure 22. TIM Counter Modulo Registers (TMODH:TMODL)
T1SC0: $0025; T2SC0: $0035
Bit 7
654321
Bit 0
CH0F
CH0IE
MS0B
MS0A
ELS0B
ELS0A
TOV0
CH0MAX
Reset:
00000000
T1SC1: $0028; T2SC1: $0038
Bit 7
654321
Bit 0
CH1F
CH1IE
0
MS1A
ELS1B
ELS1A
TOV1
CH1MAX
Reset:
00000000
Figure 23. TIM Channel Status and Control
Registers (TSC0, TSC1)
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For More Information On This Product,
Go to: www.freescale.com
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相關代理商/技術參數(shù)
參數(shù)描述
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