參數(shù)資料
型號: MC68HCP11A1VP2
廠商: MOTOROLA INC
元件分類: 微控制器/微處理器
英文描述: HCMOS Single-Chip Microcontroller
中文描述: 8-BIT, 2 MHz, MICROCONTROLLER, PDIP48
封裝: DIP-48
文件頁數(shù): 17/158頁
文件大?。?/td> 776K
代理商: MC68HCP11A1VP2
MC68HC11A8
TECHNICAL DATA
SIGNAL DESCRIPTIONS AND OPERATING MODES
MOTOROLA
2-1
2
2 SIGNAL DESCRIPTIONS AND OPERATING MODES
The signal descriptions and operating modes are presented in this section. When the
microcontroller is in an expanded multiplexed operating mode, 18 pins change func-
tion to support a multiplexed address/data bus.
2.1 Signal Pin Descriptions
The following paragraphs provide a description of the input/output signals. Reference
is made, where applicable, to other sections that contain more detail about the function
being performed.
2.1.1 Input Power (V
Power is supplied to the microcontroller using these pins. V
put and V
SS
is ground. Although the MC68HC11A8 is a CMOS device, very fast signal
transitions are present on many of its pins. Short rise and fall times are present even
when the microcontroller is operating at slow clock rates. Special care must be taken
to provide good power supply bypassing at the MCU. Recommended bypassing would
include a 0.1
μ
F ceramic capacitor between the V
cent to one of the two pins. A bulk capacitance, whose size depends on the other cir-
cuitry in the system, should also be present on the circuit board.
DD
) and Ground (V
SS
)
DD
is the positive power in-
DD
and V
SS
pins and physically adja-
2.1.2 Reset (RESET)
This active low bidirectional control signal is used as an input to initialize the
MC68HC11A8 to a known start-up state, and as an open-drain output to indicate that
an internal failure has been detected in either the clock monitor or computer operating
properly (COP) watchdog circuit. This reset signal is significantly different from the re-
set signal used on other Motorola MCUs. Please refer to
AND LOW POWER MODES
before designing circuitry to generate or monitor this sig-
nal.
9 RESETS, INTERRUPTS,
2.1.3 Crystal Driver and External Clock Input (XTAL, EXTAL)
These two pins provide the interface for either a crystal or a CMOS compatible clock
to control the internal clock generator circuitry. The frequency applied to these pins
shall be four times higher than the desired E clock rate. The XTAL pin is normally left
unterminated when using an external CMOS compatible clock input to the EXTAL pin.
However, a 10K to 100K load resistor to ground may be used to reduce RFI noise
emission. The XTAL output is normally intended to drive only a crystal.
The XTAL output may be buffered with a high-input-impedance buffer such as the
74HC04, or it may be used to drive the EXTAL input of another M68HC11.
In all cases take extra care in the circuit board layout around the oscillator pins. Load
capacitances shown in the oscillator circuits include all stray layout capacitances. Re-
fer to
Figure 2-1
,
Figure 2-2
, and
Figure 2-3
for diagrams of oscillator circuits.
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