參數(shù)資料
型號： MC68HCP11A1VP2
廠商： MOTOROLA INC
元件分類： 微控制器/微處理器
英文描述： HCMOS Single-Chip Microcontroller
中文描述： 8-BIT, 2 MHz, MICROCONTROLLER, PDIP48
封裝： DIP-48
文件頁數(shù)： 68/158頁
文件大?。?/td> 776K
代理商： MC68HCP11A1VP2
MOTOROLA
7-4
ANALOG-TO-DIGITAL CONVERTER
MC68HC11A8
TECHNICAL DATA
7
CAUTION
When the multiple channel continuous scan mode is used, extra care
is needed in the design of circuitry driving the A/D inputs. Refer to the
A/D Pin Model and A/D Conversion Sequence figures in addition to
the following discussion. The charge on the capacitive DAC array pri-
or to the sample time is related to the voltage on the previously con-
verted channel. A charge share situation exists between the internal
DAC capacitance and the external circuit capacitance. Although the
amount of charge involved is small the rate at which it is repeated is
every 64 microseconds for an E clock of 2 MHz. The RC charging
rate of the external circuit must be balanced against this charge shar-
ing effect to avoid accuracy errors.
CD — Channel Select D
CC — Channel Select C
CB — Channel Select B
CA — Channel Select A
These four bits are used to select one of 16 A/D channels (see
Table 7-1
). When a
multiple channel mode is selected (MULT = 1), the two least-significant channel select
bits (CB and CA) have no meaning and the CD and CC bits specify which group of four
channels are to be converted. The channels selected by the four channel select control
bits are shown in
Table 7-1
.
*Not available in 48-pin package versions.
**This group of channels used during factory test.
Table 7-1 Analog-to-Digital Channel Assignments
Channel
Signal
AN0
AN1
AN2
AN3
AN4*
AN5*
AN6*
AN7*
Reserved
Reserved
Reserved
Reserved
V
RH
Pin**
V
RL
Pin**
(V
RH
)/2**
Reserved**
Result in ADRx
if MULT=1
ADR1
ADR2
ADR3
ADR4
ADR1
ADR2
ADR3
ADR4
ADR1
ADR2
ADR3
ADR4
ADR1
ADR2
ADR3
ADR4
CD
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
CC
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
CB
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
CA
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
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