參數(shù)資料
型號: MC68HSC05C8AFN
廠商: MOTOROLA INC
元件分類: 微控制器/微處理器
英文描述: 8-BIT, MROM, 4.1 MHz, MICROCONTROLLER, PQCC44
封裝: PLASTIC, LCC-44
文件頁數(shù): 121/166頁
文件大小: 1914K
代理商: MC68HSC05C8AFN
Input/Output (I/O) Ports
Technical Data
MC68HC05C8A MC68HCL05C8A MC68HSC05C8A — Rev. 5.0
58
Input/Output (I/O) Ports
MOTOROLA
Figure 7-2. I/O Circuitry
Table 7-1. I/O Pin Functions
R/W(1)
1. R/W is an internal signal.
DDR
I/O Pin Function
00
The I/O pin is in input mode. Data is written into the output
data latch.
0
1
Data is written into the output data latch and output to the I/O pin.
1
0
The state of the I/O pin is read.
1
The I/O pin is in an output mode. The output data latch is read.
READ DDRx
WRITE DDRx
RESET
WRITE PORTx
READ PORTx
INT
ERNAL
D
AT
A
B
U
S
PORT x DATA
DATA DIRECTION
REGISTER x BIT
REGISTER BIT
(LATCHED OUTPUT)
I/O
PIN
[1]
[2]
[3]
[1] This output buffer enables the latched output to drive the pin when DDR bit is 1 (output mode).
[2] This input buffer is enabled when DDR bit is 0 (input mode).
[3] This input buffer is enabled when DDR bit is 1 (output mode).
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