參數(shù)資料
型號： MC68SZ328
廠商： 飛思卡爾半導(dǎo)體(中國)有限公司
英文描述： i.MX Integrated Portable System Processor
中文描述： i.MX處理器集成的便攜式系統(tǒng)
文件頁數(shù)： 7/96頁
文件大?。?/td> 1495K
代理商： MC68SZ328
Signals and Connections
MC9328MX1 Advance Information, Rev. 4
Freescale Semiconductor
7
DQM [3:0]
SDRAM data enable
CSD0
SDRAM/SyncFlash Chip Select signal which is multiplexed with the CS2 signal. These two signals
are selectable by programming the system control register.
CSD1
SDRAM/SyncFlash Chip Select signal which is multiplex with CS3 signal. These two signals are
selectable by programming the system control register. By default, CSD1 is selected, so it can be
used as SyncFlash boot chip select by properly configuring BOOT [3:0] input pins.
RAS
SDRAM/SyncFlash Row Address Select signal
CAS
SDRAM/SyncFlash Column Address Select signal
SDWE
SDRAM/SyncFlash Write Enable signal
SDCKE0
SDRAM/SyncFlash Clock Enable 0
SDCKE1
SDRAM/SyncFlash Clock Enable 1
SDCLK
SDRAM/SyncFlash Clock
RESET_SF
SyncFlash Reset
Clocks and Resets
EXTAL16M
Crystal input (4 MHz to 16 MHz), or a 16 MHz oscillator input when internal oscillator circuit is shut
down.
XTAL16M
Crystal output
EXTAL32K
32 kHz crystal input
XTAL32K
32 kHz crystal output
CLKO
Clock Out signal selected from internal clock signals. Please refer to clock controller for internal
clock selection.
RESET_IN
Master Reset—External active low Schmitt trigger input signal. When this signal goes active, all
modules (except the reset module and the clock control module) are reset.
RESET_OUT
Reset Out—Internal active low output signal from the Watchdog Timer module and is asserted from
the following sources: Power-on reset, External reset (RESET_IN), and Watchdog time-out.
POR
Power On Reset—Internal active high Schmitt trigger input signal. The POR signal is normally
generated by an external RC circuit designed to detect a power-up event.
JTAG
TRST
Test Reset Pin—External active low signal used to asynchronously initialize the JTAG controller.
TDO
Serial Output for test instructions and data. Changes on the falling edge of TCK.
TDI
Serial Input for test instructions and data. Sampled on the rising edge of TCK.
Table 3. Signal Names and Descriptions (Continued)
Signal Name
Function/Notes
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
MC68SZ328ACVM66 功能描述:IC MPU DRAGONBALL SZ 196-PBGA RoHS:是 類別:集成電路 (IC) >> 嵌入式 - 微處理器 系列:M683xx 標(biāo)準(zhǔn)包裝:1 系列:MPC85xx 處理器類型:32-位 MPC85xx PowerQUICC III 特點:- 速度:1.2GHz 電壓:1.1V 安裝類型:表面貼裝 封裝/外殼:783-BBGA，F(xiàn)CBGA 供應(yīng)商設(shè)備封裝:783-FCPBGA（29x29） 包裝:托盤
MC68SZ328ACVMR2 功能描述:IC MPU DRAGONBALL SZ 196-PBGA RoHS:是 類別:集成電路 (IC) >> 嵌入式 - 微處理器 系列:M683xx 標(biāo)準(zhǔn)包裝:1 系列:MPC85xx 處理器類型:32-位 MPC85xx PowerQUICC III 特點:- 速度:1.2GHz 電壓:1.1V 安裝類型:表面貼裝 封裝/外殼:783-BBGA，F(xiàn)CBGA 供應(yīng)商設(shè)備封裝:783-FCPBGA（29x29） 包裝:托盤
MC68SZ328AVH66 制造商:Freescale Semiconductor 功能描述:Microprocessor IC Processor Ty
MC68SZ328AVM66 功能描述:IC MPU DRAGONBALL SZ 196-PBGA RoHS:是 類別:集成電路 (IC) >> 嵌入式 - 微處理器 系列:M683xx 標(biāo)準(zhǔn)包裝:1 系列:MPC85xx 處理器類型:32-位 MPC85xx PowerQUICC III 特點:- 速度:1.2GHz 電壓:1.1V 安裝類型:表面貼裝 封裝/外殼:783-BBGA，F(xiàn)CBGA 供應(yīng)商設(shè)備封裝:783-FCPBGA（29x29） 包裝:托盤
MC68SZ328VH66V 制造商:Freescale Semiconductor 功能描述:
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