參數資料
型號: MC74HC589ADR2
廠商: ON Semiconductor
文件頁數: 12/14頁
文件大?。?/td> 0K
描述: IC SHIFT REGISTR 8BIT 3ST 16SOIC
產品變化通告: Product Discontinuation 27/Jan/2012
標準包裝: 1
系列: 74HC
邏輯類型: 移位寄存器
輸出類型: 標準
元件數: 1
每個元件的位元數: 8
功能: 通用
電源電壓: 2 V ~ 6 V
工作溫度: -55°C ~ 125°C
安裝類型: 表面貼裝
封裝/外殼: 16-SOIC(0.154",3.90mm 寬)
供應商設備封裝: 16-SOIC
包裝: 剪切帶 (CT)
其它名稱: MC74HC589ADR2OSCT
MC74HC589A
http://onsemi.com
7
FUNCTION TABLE
Inputs
Resulting Function
Operation
Output
Enable
Serial Shift/
Parallel Load
Latch
Clock
Shift
Clock
Serial
Input
SA
Parallel
Inputs
AH
Data
Latch
Contents
Shift
Register
Contents
Output
QH
Force Output into High
Impedance State
H
X
Z
Load Parallel Data into Data
Latch
L
H
L, H,
X
ah
U
Transfer Latch Contents to
Shift Register
L
L, H,
X
U
LRN → SRN
LRH
Contents of Input Latch and
Shift Register are Unchanged
L
H
L, H,
X
U
Load Parallel Data into Data
Latch and Shift Register
L
X
ah
h
Shift Serial Data into Shift
Register
L
H
X
D
X
*
SRA = D,
SRN → SRN+1
SRG → SRH
Load Parallel Data in Data
Latch and Shift Serial Data
into Shift Register
L
H
D
ah
SRA = D,
SRN → SRN+1
SRG → SRH
LR = latch register contents
SR = shift register contents
ah = data at parallel data inputs AH
D
= data (L, H) at serial data input SA
U = remains unchanged
X = don’t care
Z = high impedance
*
= depends on Latch Clock input
90%
10%
Figure 3. (Serial Shift/Parallel Load = L)
Figure 4. (Serial Shift/Parallel Load = H)
LATCH
CLOCK
QH
tr
tf
VCC
GND
90%
50%
10%
tPLH
tPHL
tTLH
tTHL
tw
SHIFT
CLOCK
QH
VCC
GND
50%
tPLH
tPHL
1/fmax
90%
50%
10%
tw
Figure 5.
QH
50%
tPZL
tPLZ
tPZH
tPHZ
VCC
GND
HIGH
IMPEDANCE
VOL
VOH
OUTPUT
ENABLE
50%
SERIAL SHIFT/
PARALLEL LOAD
QH
50%
tPLH
50%
VCC
GND
tPHL
50%
tw
Figure 6.
Switching Waveforms
HIGH
IMPEDANCE
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