參數(shù)資料
型號: MC74HCT595ADG
廠商: ON Semiconductor
文件頁數(shù): 8/11頁
文件大?。?/td> 0K
描述: IC SHIFT REGISTER 8BIT 16SOIC
標準包裝: 48
系列: 74HCT
邏輯類型: 移位寄存器
輸出類型: 三態(tài)
元件數(shù): 1
每個元件的位元數(shù): 8
功能: 串行至并行
電源電壓: 4.5 V ~ 5.5 V
工作溫度: -55°C ~ 125°C
安裝類型: 表面貼裝
封裝/外殼: 16-SOIC(0.154",3.90mm 寬)
供應(yīng)商設(shè)備封裝: 16-SOIC
包裝: 管件
MC74HCT595A
http://onsemi.com
6
FUNCTION TABLE
Operation
Inputs
Resulting Function
Reset
Serial
Input
A
Shift
Clock
Latch
Clock
Output
Enable
Shift
Register
Contents
Latch
Register
Contents
Serial
Output
SQH
Parallel
Outputs
QA QH
Reset shift register
L
X
L, H, ↓
L
U
L
U
Shift data into shift
register
H
D
L, H, ↓
L
D → SRA;
SRN → SRN+1
U
SRG → SRH
U
Shift register remains
unchanged
H
X
L, H, ↓
L
U
Transfer shift register
contents to latch
register
H
X
L, H, ↓
L
U
SRN → LRN
U
SRN
Latch register remains
unchanged
X
L, H, ↓
L
*
U
*
U
Enable parallel outputs
X
L
*
**
*
Enabled
Force outputs into high
impedance state
X
H
*
**
*
Z
SR = shift register contents
D = data (L, H) logic level
↑ = LowtoHigh
* = depends on Reset and Shift Clock inputs
LR = latch register contents
U = remains unchanged
↓ = HightoLow
** = depends on Latch Clock input
PIN DESCRIPTIONS
INPUTS
A (Pin 14)
Serial Data Input. The data on this pin is shifted into the
8bit serial shift register.
CONTROL INPUTS
Shift Clock (Pin 11)
Shift Register Clock Input. A low tohigh transition on
this input causes the data at the Serial Input pin to be shifted
into the 8bit shift register.
Reset (Pin 10)
Activelow, Asynchronous, Shift Register Reset Input. A
low on this pin resets the shift register portion of this device
only. The 8bit latch is not affected.
Latch Clock (Pin 12)
Storage Latch Clock Input. A lowtohigh transition on
this input latches the shift register data.
Output Enable (Pin 13)
Activelow Output Enable. A low on this input allows the
data from the latches to be presented at the outputs. A high
on this input forces the outputs (QAQH) into the
highimpedance state. The serial output is not affected by
this control unit.
OUTPUTS
QA QH (Pins 15, 1, 2, 3, 4, 5, 6, 7)
Noninverted, 3state, latch outputs.
SQH (Pin 9)
Noninverted, Serial Data Output. This is the output of the
eighth stage of the 8bit shift register. This output does not
have threestate capability.
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