271
8023F–AVR–07/09
ATmega325P/3250P
25. Memory Programming
25.1
Program And Data Memory Lock Bits
The ATmega325P/3250P provides six Lock bits which can be left unprogrammed (“1”) or can be
programmed (“0”) to obtain the additional features listed in
Table 25-2. The Lock bits can only be
erased to “1” with the Chip Erase command.
Note:
1. “1” means unprogrammed, “0” means programmed
Table 25-1.
Lock Bit Byte
Lock Bit Byte
Bit No
Description
Default Value
7
–
1 (unprogrammed)
6
–
1 (unprogrammed)
BLB12
5
Boot Lock bit
1 (unprogrammed)
BLB11
4
Boot Lock bit
1 (unprogrammed)
BLB02
3
Boot Lock bit
1 (unprogrammed)
BLB01
2
Boot Lock bit
1 (unprogrammed)
LB2
1
Lock bit
1 (unprogrammed)
LB1
0
Lock bit
1 (unprogrammed)
Table 25-2.
Lock Bit Protection Modes
Memory Lock Bits
Protection Type
LB Mode
LB2
LB1
1
No memory lock features enabled.
21
0
Further programming of the Flash and EEPROM is disabled in
Parallel and Serial Programming mode. The Fuse bits are
locked in both Serial and Parallel Programming mode
.(1)30
0
Further programming and verification of the Flash and
EEPROM is disabled in Parallel and Serial Programming mode.
The Boot Lock bits and Fuse bits are locked in both Serial and
Parallel Programming mode
.(1)BLB0 Mode
BLB02
BLB01
11
1
No restrictions for SPM or LPM accessing the Application
section.
2
1
0
SPM is not allowed to write to the Application section.
30
0
SPM is not allowed to write to the Application section, and LPM
executing from the Boot Loader section is not allowed to read
from the Application section. If Interrupt Vectors are placed in
the Boot Loader section, interrupts are disabled while executing
from the Application section.
40
1
LPM executing from the Boot Loader section is not allowed to
read from the Application section. If Interrupt Vectors are placed
in the Boot Loader section, interrupts are disabled while
executing from the Application section.