參數(shù)資料
型號: MC80C52XXX-16SHXXX:D
廠商: TEMIC SEMICONDUCTORS
元件分類: 微控制器/微處理器
英文描述: 8-BIT, MROM, 16 MHz, MICROCONTROLLER, CDIP40
文件頁數(shù): 11/141頁
文件大小: 7628K
193
8021G–AVR–03/11
ATmega329P/3290P
19.10.5
UBRRnL and UBRRnH – USART Baud Rate Registers n
Bit 15:12 – Reserved Bits
These bits are reserved for future use. For compatibility with future devices, these bit must be
written to zero when UBRRnH is written.
Bit 11:0 – UBRR11:0: USART Baud Rate Register
This is a 12-bit register which contains the USART baud rate. The UBRRnH contains the four
most significant bits, and the UBRRnL contains the eight least significant bits of the USART
baud rate. Ongoing transmissions by the Transmitter and Receiver will be corrupted if the baud
rate is changed. Writing UBRRnL will trigger an immediate update of the baud rate prescaler.
19.11 Examples of Baud Rate Setting
For standard crystal and resonator frequencies, the most commonly used baud rates for asyn-
chronous operation can be generated by using the UBRRn settings in Table 19-3. UBRRn
values which yield an actual baud rate differing less than 0.5% from the target baud rate, are
bold in the table. Higher error ratings are acceptable, but the Receiver will have less noise resis-
tance when the error ratings are high, especially for large serial frames (see ”Asynchronous
Operational Range” on page 186). The error values are calculated using the following equation:
Figure 19-13. UCPOLn Bit Settings
UCPOLn
Transmitted Data Changed (Output
of TxD Pin)
Received Data Sampled (Input
on RxD Pin)
0
Rising XCK Edge
Falling XCK Edge
1
Falling XCK Edge
Rising XCK Edge
Bit
1514131211
10
9
8
UBRRn[11:8]
UBRRnH
UBRRn[7:0]
UBRRnL
76
543210
Read/Write
RRRR
R/W
Initial Value
0
000000
00
000000
Error[%]
BaudRate
Closest Match
BaudRate
--------------------------------------------------------
1
100%
=
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