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| 型號(hào)： | MC80C52XXX-16SHXXX:D |
| 廠商： | TEMIC SEMICONDUCTORS |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 8-BIT, MROM, 16 MHz, MICROCONTROLLER, CDIP40 |
| 文件頁(yè)數(shù)： | 127/141頁(yè) |
| 文件大?。?/td> | 7628K |
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56
2486AA–AVR–02/2013
ATmega8(L)
Unconnected pins
If some pins are unused, it is recommended to ensure that these pins have a defined level. Even
though most of the digital inputs are disabled in the deep sleep modes as described above, float-
ing inputs should be avoided to reduce current consumption in all other modes where the digital
inputs are enabled (Reset, Active mode and Idle mode).
The simplest method to ensure a defined level of an unused pin, is to enable the internal pull-up.
In this case, the pull-up will be disabled during reset. If low power consumption during reset is
important, it is recommended to use an external pull-up or pull-down. Connecting unused pins
directly to V
CC or GND is not recommended, since this may cause excessive currents if the pin is
accidentally configured as an output.
Alternate Port
Functions
Most port pins have alternate functions in addition to being general digital I/Os. Figure 25 shows
how the port pin control signals from the simplified Figure 22 on page 52 can be overridden by
alternate functions. The overriding signals may not be present in all port pins, but the figure
serves as a generic description applicable to all port pins in the AVR microcontroller family.
Figure 25. Alternate Port Functions
Note:
1. WPx, WDx, RRx, RPx, and RDx are common to all pins within the same port. clk
I/O, SLEEP,
and PUD are common to all ports. All other signals are unique for each pin
clk
RPx
RRx
WPx
RDx
WDx
PUD
SYNCHRONIZER
WDx:
WRITE DDRx
WPx:
WRITE PORTx
RRx:
READ PORTx REGISTER
RPx:
READ PORTx PIN
PUD:
PULLUP DISABLE
clk
I/O:
I/O CLOCK
RDx:
READ DDRx
D
L
Q
SET
CLR
0
1
0
1
0
1
DIxn
AIOxn
DIEOExn
PVOVxn
PVOExn
DDOVxn
DDOExn
PUOExn
PUOVxn
PUOExn:
Pxn PULL-UP OVERRIDE ENABLE
PUOVxn:
Pxn PULL-UP OVERRIDE VALUE
DDOExn:
Pxn DATA DIRECTION OVERRIDE ENABLE
DDOVxn:
Pxn DATA DIRECTION OVERRIDE VALUE
PVOExn:
Pxn PORT VALUE OVERRIDE ENABLE
PVOVxn:
Pxn PORT VALUE OVERRIDE VALUE
DIxn:
DIGITAL INPUT PIN n ON PORTx
AIOxn:
ANALOG INPUT/OUTPUT PIN n ON PORTx
RESET
Q
D
CLR
Q
D
CLR
Q
D
CLR
PINxn
PORTxn
DDxn
D
ATA
B
U
S
0
1
DIEOVxn
SLEEP
DIEOExn: Pxn DIGITAL INPUT-ENABLE OVERRIDE ENABLE
DIEOVxn: Pxn DIGITAL INPUT-ENABLE OVERRIDE VALUE
SLEEP:
SLEEP CONTROL
Pxn
I/O
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