參數(shù)資料
型號: MC8641HX1000NE
廠商: Freescale Semiconductor
文件頁數(shù): 81/130頁
文件大?。?/td> 0K
描述: IC DUAL CORE PROCESSOR 994-CBGA
標(biāo)準(zhǔn)包裝: 1
系列: MPC86xx
處理器類型: 32-位 MPC86xx PowerPC
速度: 1.0GHz
電壓: 0.95V
安裝類型: 表面貼裝
封裝/外殼: 994-BCBGA,F(xiàn)CCBGA
供應(yīng)商設(shè)備封裝: 994-FCCBGA(33x33)
包裝: 托盤
MPC8641 and MPC8641D Integrated Host Processor Hardware Specifications, Rev. 2
54
Freescale Semiconductor
JTAG
11 JTAG
This section describes the DC and AC electrical specifications for the IEEE 1149.1 (JTAG) interface of
the MPC8641/D.
11.1
JTAG DC Electrical Characteristics
Table 43 provides the DC electrical characteristics for the JTAG interface.
11.2
JTAG AC Electrical Specifications
Table 44 provides the JTAG AC timing specifications as defined in Figure 33 through Figure 35.
Table 43. JTAG DC Electrical Characteristics
Parameter
Symbol
Min
Max
Unit
High-level input voltage
VIH
2OVDD + 0.3
V
Low-level input voltage
VIL
– 0.3
V
Input current
(VIN
1 = 0 V or V
IN = VDD)
IIN
—±5
μA
High-level output voltage
(OVDD = min, IOH = –100 μA)
VOH
OVDD – 0.2
V
Low-level output voltage
(OVDD = min, IOL = 100 μA)
VOL
—0.2
V
Note:
1. Note that the symbol VIN, in this case, represents the OVIN symbol referenced in Table 1 and Table 2.
Table 44. JTAG AC Timing Specifications (Independent of SYSCLK) 1
At recommended operating conditions (see Table 3).
Parameter
Symbol 2
Min
Max
Unit
Notes
JTAG external clock frequency of operation
fJTG
0
33.3
MHz
JTAG external clock cycle time
t JTG
30
ns
JTAG external clock pulse width measured at 1.4 V
tJTKHKL
15
ns
JTAG external clock rise and fall times
tJTGR & tJTGF
02
ns
6
TRST assert time
tTRST
25
ns
3
Input setup times:
Boundary-scan data
TMS, TDI
tJTDVKH
tJTIVKH
4
0
ns
4
Input hold times:
Boundary-scan data
TMS, TDI
tJTDXKH
tJTIXKH
20
25
ns
4
Valid times:
Boundary-scan data
TDO
tJTKLDV
tJTKLOV
4
20
25
ns
5
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