參數(shù)資料
型號: MC88LV926DW
廠商: FREESCALE SEMICONDUCTOR INC
元件分類: 時鐘及定時
英文描述: 88LV SERIES, PLL BASED CLOCK DRIVER, 4 TRUE OUTPUT(S), 1 INVERTED OUTPUT(S), PDSO20
封裝: PLASTIC, SOIC-20
文件頁數(shù): 9/9頁
文件大?。?/td> 120K
代理商: MC88LV926DW
MC88LV926
FREESCALE SEMICONDUCTOR ADVANCED CLOCK DRIVERS DEVICE DATA
61
Figure 7. Recommended Loop Filter and Analog Isolation Scheme for the MC88LV926
Figure 8. Typical MC88LV926/MC68060 System Configuration
47
BOARD VCC
0.1
F (LOOP
FILTER CAP)
330
470K
0.1
F HIGH
FREQ BIAS
10
F LOW
FREQ BIAS
47
BOARD GND
6
ANALOG LOOP
FILTER/VCO SECTION OF
THE MC88LV926 20–PIN
SOIC PACKAGE (NOT
DRAWN TO SCALE)
A SEPARATE ANALOG POWER SUPPLY IS NOT
NECESSARY AND SHOULD NOT BE USED. FOLLOWING
THESE PRESCRIBED GUIDELINES IS ALL THAT IS
NECESSARY TO USE THE MC88LV926 IN A NORMAL
NOTE: FURTHER LOOP OPTIMIZATION MAY OCCUR
RC1
7
ANALOG VCC
5
ANALOG GND
A SEPARATE ANALOG POWER SUPPLY IS NOT
NECESSARY AND SHOULD NOT BE USED. FOLLOWING
THESE PRESCRIBED GUIDELINES IS ALL THAT IS
NECESSARY TO USE THE MC88LV926 IN A NORMAL
2X_Q
QCLKEN
Q0
Q1
Q2
Q3
RST_OUT
SYNC
RST_IN
16.67MHz
X–TAL
OSCILLATOR
SYSTEM RESET
MC68060
PCLK
RESET
ASIC
MEMORY MODULE
66MHz
33MHz
CLKEN
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