Memory
MC68HC908QL4 MC68HC908QL3 MC68HC908QL2 Data Sheet, Rev. 4
28
Freescale Semiconductor
$001C
Keyboard Interrupt
Polarity Register (KBIPR)
See page 95.
Read:
0
0
KBIP5
KBIP4
KBIP3
KBIP2
KBIP1
KBIP0
Write:
Reset:
0
0
0
0
0
0
0
0
$001D
IRQ Status and Control
Register (INTSCR)
See page 87.
Read:
0
0
0
0
IRQF
0
IMASK
MODE
Write:
ACK
Reset:
0
0
0
0
0
0
0
0
$001E
Configuration Register 2
(CONFIG2)
(1)
See page 63.
Read:
IRQPUD
IRQEN
R
R
R
R
OSCENIN-
STOP
RSTEN
Write:
Reset:
0
0
0
0
0
0
0
0
(2)
1. One-time writable register after each reset.
2. RSTEN reset to 0 by a power-on reset (POR) only.
$001F
Configuration Register 1
(CONFIG1)
(1)
See page 64.
Read:
COPRS
LVISTOP
LVIRSTD
LVIPWRD
LVITRIP
SSREC
STOP
COPD
Write:
Reset:
0
0
0
0
0
(2)
0
0
0
1. One-time writable register after each reset.
2. LVITRIP reset to 0 by a power-on reset (POR) only.
$0020
TIM Status and Control
Register (TSC)
See page 180.
Read:
TOF
TOIE
TSTOP
0
0
PS2
PS1
PS0
Write:
0
TRST
Reset:
0
0
1
0
0
0
0
0
$0021
TIM Counter Register High
(TCNTH)
See page 182.
Read:
Bit 15
Bit 14
Bit 13
Bit 12
Bit 11
Bit 10
Bit 9
Bit 8
Write:
Reset:
0
0
0
0
0
0
0
0
$0022
TIM Counter Register
Low (TCNTL)
See page 182.
Read:
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Write:
Reset:
0
0
0
0
0
0
0
0
$0023
TIM Counter Modulo
Register High (TMODH)
See page 182.
Read:
Bit 15
Bit 14
Bit 13
Bit 12
Bit 11
Bit 10
Bit 9
Bit 8
Write:
Reset:
1
1
1
1
1
1
1
1
$0024
TIM Counter Modulo
Register Low (TMODL)
See page 182.
Read:
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Write:
Reset:
1
1
1
1
1
1
1
1
$0025
TIM Channel 0 Status and
Control Register (TSC0)
See page 183.
Read:
CH0F
CH0IE
MS0B
MS0A
ELS0B
ELS0A
TOV0
CH0MAX
Write:
0
Reset:
0
0
0
0
0
0
0
0
Addr.
Register Name
Bit 7
6
5
4
3
2
1
Bit 0
=Unimplemented
R
= Reserved
U = Unaffected
Figure 2-2. Control, Status, and Data Registers (Sheet 2 of 7)