參數(shù)資料
型號: MC9328MX21CVMR2
廠商: Freescale Semiconductor
文件頁數(shù): 50/100頁
文件大?。?/td> 0K
描述: IC MCU I.MX21 266MHZ 289-MAPBGA
標準包裝: 1,000
系列: i.MX21
核心處理器: ARM9
芯體尺寸: 32-位
速度: 266MHz
連通性: 1 線,EBI/EMI,I²C,IrDA,MMC,智能卡,SPI,SSI,UART/USART,USB OTG
外圍設備: DMA,I²S,LCD,POR,PWM,WDT
輸入/輸出數(shù): 192
程序存儲器類型: ROMless
電壓 - 電源 (Vcc/Vdd): 1.45 V ~ 3.3 V
振蕩器型: 外部
工作溫度: -40°C ~ 85°C
封裝/外殼: 289-LFBGA
包裝: 帶卷 (TR)
Specifications
MC9328MX21 Technical Data, Rev. 3.4
Freescale Semiconductor
53
Table 34. SSI to SAP Ports Timing Parameters
Ref
No.
Parameter
1.8 V
± 0.1 V
3.0 V
± 0.3 V
Unit
Minimum
Maximum
Minimum
Maximum
Internal Clock Operation1 (SAP Ports)
1
(Tx/Rx) CK clock period1 90.
91
90.91
ns
2
(Tx) CK high to FS (bl) high
-3.30
-1.16
-2.98
-1.10
ns
3
(Rx) CK high to FS (bl) high
-3.93
-1.34
-4.18
-1.43
ns
4
(Tx) CK high to FS (bl) low
-3.30
-1.16
-2.98
-1.10
ns
5
(Rx) CK high to FS (bl) low
-3.93
-1.34
-4.18
-1.43
ns
6
(Tx) CK high to FS (wl) high
-3.30
-1.16
-2.98
-1.10
ns
7
(Rx) CK high to FS (wl) high
-3.93
-1.34
-4.18
-1.43
ns
8
(Tx) CK high to FS (wl) low
-3.30
-1.16
-2.98
-1.10
ns
9
(Rx) CK high to FS (wl) low
-3.93
-1.34
-4.18
-1.43
ns
10
(Tx) CK high to STXD valid from high impedance
-2.44
-0.60
-2.65
-0.98
ns
11a (Tx) CK high to STXD high
-2.44
-0.60
-2.65
-0.98
ns
11b (Tx) CK high to STXD low
-2.44
-0.60
-2.65
-0.98
ns
12
(Tx) CK high to STXD high impedance
-2.67
-0.99
-2.65
-0.98
ns
13
SRXD setup time before (Rx) CK low
23.68
22.09
ns
14
SRXD hold time after (Rx) CK low
0
0
ns
External Clock Operation (SAP Ports)
15
(Tx/Rx) CK clock period1 90.
91
90.91
ns
16
(Tx/Rx) CK clock high period
36.36
36.36
ns
17
(Tx/Rx) CK clock low period
36.36
36.36
ns
18
(Tx) CK high to FS (bl) high
10.24
19.50
7.16
8.65
ns
19
(Rx) CK high to FS (bl) high
10.89
21.27
7.63
9.12
ns
20
(Tx) CK high to FS (bl) low
10.24
19.50
7.16
8.65
ns
21
(Rx) CK high to FS (bl) low
10.89
21.27
7.63
9.12
ns
22
(Tx) CK high to FS (wl) high
10.24
19.50
7.16
8.65
ns
23
(Rx) CK high to FS (wl) high
10.89
21.27
7.63
9.12
ns
24
(Tx) CK high to FS (wl) low
10.24
19.50
7.16
8.65
ns
25
(Rx) CK high to FS (wl) low
10.89
21.27
7.63
9.12
ns
26
(Tx) CK high to STXD valid from high impedance
12.08
19.36
7.71
9.20
ns
27a (Tx) CK high to STXD high
10.80
19.36
7.71
9.20
ns
27b (Tx) CK high to STXD low
10.80
19.36
7.71
9.20
ns
28
(Tx) CK high to STXD high impedance
12.08
19.36
7.71
9.20
ns
29
SRXD setup time before (Rx) CK low
0.37
0.42
ns
30
SRXD hole time after (Rx) CK low
0
0
ns
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