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MC9328MX21S Technical Data, Rev. 1.3
8
Freescale Semiconductor
Signal Descriptions
External DMA
EXT_DMAREQ
External DMA Request input signal. This signal is multiplexed with CSPI1_RDY.
EXT_DMAGRANT
External DMA Grant output signal. This signal is multiplexed with LD[16] of LCDC and CSPI1_SS1 of
CSPI1.
NAND Flash Controller
NF_CLE
NAND Flash Command Latch Enable output signal. Multiplexed with PC_POE of PCMCIA.
NF_CE
NAND Flash Chip Enable output signal. This signal is multiplexed with PC_CE1 of PCMCIA.
NF_WP
NAND Flash Write Protect output signal. This signal is multiplexed with PC_CE2 of PCMCIA.
NF_ALE
NAND Flash Address Latch Enable output signal. This signal is multiplexed with PC_OE of PCMCIA.
NF_RE
NAND Flash Read Enable output signal. This signal is multiplexed with PC_RW of PCMCIA.
NF_WE
NAND Flash Write Enable output signal. This signal is multiplexed with and PC_BVD2 of PCMCIA.
NF_RB
NAND Flash Ready Busy input signal. This signal is multiplexed with PC_RST of PCMCIA.
NF_IO[15:0]
NAND Flash Data input and output signals. NF_IO[15:7] signals are multiplexed with A[25:21] and
A[15:13]. NF_IO[7:0] signals are multiplexed with several PCMCIA signals.
PCMCIA Controller
PC_A[25:0]
PCMCIA Address signals. These signals are multiplexed with A[25:0].
PC_D[15:0]
PCMCIA Data input and output signals. These signals are multiplexed with D[15:0].
PC_CD1
PCMCIA Card Detect1 input signal. This signal is multiplexed with NFIO[7] signal of NF.
PC_CD2
PCMCIA Card Detect2 input signal. This signal is multiplexed with NFIO[6] signal of NF.
PC_WAIT
PCMCIA Wait input signal to extend current access. This signal is multiplexed with NFIO[5] signal of NF.
PC_READY
PCMCIA Ready input signal indicates card is ready for access. Multiplexed with NFIO[4] signal of NF.
PC_RST
PCMCIA Reset output signal. This signal is multiplexed with NFRB signal of NF.
PC_OE
PCMCIA Memory Read Enable output signal asserted during common or attribute memory read cycles.
This signal is multiplexed with NFALE signal of NF.
PC_WE
PCMCIA Memory Write Enable output signal asserted during common or attribute memory cycles. This
signal is shared with RW of the EIM.
PC_VS1
PCMCIA Voltage Sense1 input signal. This signal is multiplexed with NFIO[2] signal of NF.
PC_VS2
PCMCIA Voltage Sense2 input signal. This signal is multiplexed with NFIO[1] signal of NF.
PC_BVD1
PCMCIA Battery Voltage Detect1 input signal. This signal is multiplexed with NFIO[0] signal of NF.
PC_BVD2
PCMCIA Battery Voltage Detect2 input signal. This signal is multiplexed with NF_WE signal of NF.
PC_SPKOUT
PCMCIA Speaker Out output signal. This signal is multiplexed with PWMO signal.
PC_REG
PCMCIA Register Select output signal. This signal is shared with EB2 of EIM.
PC_CE1
PCMCIA Card Enable1 output signal. This signal is multiplexed with NFCE signal of NF.
PC_CE2
PCMCIA Card Enable2 output signal. This signal is multiplexed with NFWP signal of NF.
PC_IORD
PCMCIA IO Read output signal. This signal is shared with EB3 of EIM.
PC_IOWR
PCMCIA IO Write output signal. This signal is shared with OE signal of EIM.
PC_WP
PCMCIA Write Protect input signal. This signal is multiplexed with NFIO[3] signal of NF.
Table 2. i.MX21S Signal Descriptions (Continued)
Signal Name
Function/Notes
Because
of
an
order
from
the
United
States
International
Trade
Commission,
BGA-packaged
product
lines
and
part
numbers
indicated
here
currently
are
not
available
from
Freescale
for
import
or
sale
in
the
United
States
prior
to
September
2010:
i.MX21
Product
Family