參數(shù)資料
型號(hào): MC9328MXSVF10
廠商: FREESCALE SEMICONDUCTOR INC
元件分類: 微控制器/微處理器
英文描述: 32-BIT, 100 MHz, MICROPROCESSOR, PBGA225
封裝: 13 X 13 MM, PLASTIC, BGA-225
文件頁(yè)數(shù): 4/72頁(yè)
文件大?。?/td> 1411K
代理商: MC9328MXSVF10
MC9328MXS Advance Information, Rev. 0
12
Freescale Semiconductor
Specifications
3.6 Embedded Trace Macrocell
All registers in the ETM9 are programmed through a JTAG interface. The interface is an extension of the
ARM920T processor’s TAP controller, and is assigned scan chain 6. The scan chain consists of a 40-bit shift
register comprised of the following:
32-bit data field
7-bit address field
A read/write bit
The data to be written is scanned into the 32-bit data field, the address of the register into the 7-bit address field,
and a 1 into the read/write bit.
A register is read by scanning its address into the address field and a 0 into the read/write bit. The 32-bit data field
is ignored. A read or a write takes place when the TAP controller enters the UPDATE-DR state. The timing
diagram for the ETM9 is shown in Figure 2. See Table 9 for the ETM9 timing parameters used in Figure 2.
Figure 2. Trace Port Timing Diagram
Table 9. Trace Port Timing Diagram Parameter Table
Ref
No.
Parameter
1.8 ± 0.1 V
3.0 ± 0.3 V
Unit
Minimum
Maximum
Minimum
Maximum
1
CLK frequency
0
85
0
100
MHz
2a
Clock high time
1.3
2
ns
2b
Clock low time
3
2
ns
3a
Clock rise time
4
3
ns
3b
Clock fall time
3
3
ns
4a
Output hold time
2.28
2
ns
4b
Output setup time
3.42
3
ns
TRACECLK
4b
4a
3b
2a
1
Output Trace Port
3a
Valid Data
2b
TRACECLK
(Half-Rate Clocking Mode)
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