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| 型號： | MC9328MXSVF10 |
| 廠商： | FREESCALE SEMICONDUCTOR INC |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 32-BIT, 100 MHz, MICROPROCESSOR, PBGA225 |
| 封裝： | 13 X 13 MM, PLASTIC, BGA-225 |
| 文件頁數(shù)： | 65/72頁 |
| 文件大小： | 1411K |
| 代理商： | MC9328MXSVF10 |
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MC9328MXS Advance Information, Rev. 0
68
Freescale Semiconductor
Specifications
16
STCK/SRCK clock high period
27.1
–
40.7
–
ns
17
STCK/SRCK clock low period
61.1
–
40.7
–
ns
18
STCK high to STFS (bl) high3
–
92.8
0
81.4
ns
19
SRCK high to SRFS (bl) high3
–
92.8
0
81.4
ns
20
STCK high to STFS (bl) low3
–
92.8
0
81.4
ns
21
SRCK high to SRFS (bl) low3
–
92.8
0
81.4
ns
22
STCK high to STFS (wl) high3
–
92.8
0
81.4
ns
23
SRCK high to SRFS (wl) high3
–
92.8
0
81.4
ns
24
STCK high to STFS (wl) low3
–
92.8
0
81.4
ns
25
SRCK high to SRFS (wl) low3
–
92.8
0
81.4
ns
26
STCK high to STXD valid from high impedance
18.9
29.07
16.6
25.5
ns
27a
STCK high to STXD high
9.23
20.75
8.1
18.2
ns
27b
STCK high to STXD low
10.60
21.32
9.3
18.7
ns
28
STCK high to STXD high impedance
17.90
29.75
15.7
26.1
ns
29
SRXD setup time before SRCK low
1.14
–
1.0
–
ns
30
SRXD hold time after SRCK low
0
–
0
–
ns
Synchronous Internal Clock Operation (Port B Alternate Function2)
31
SRXD setup before STCK falling
18.81
–
16.5
–
ns
32
SRXD hold after STCK falling
0
–
0
–
ns
Synchronous External Clock Operation (Port B Alternate Function2)
33
SRXD setup before STCK falling
1.14
–
1.0
–
ns
34
SRXD hold after STCK falling
0
–
0
–
ns
1.
All the timings for the SSI are given for a non-inverted serial clock polarity (TSCKP/RSCKP = 0) and a non-inverted
frame sync (TFSI/RFSI = 0). If the polarity of the clock and/or the frame sync have been inverted, all the timing
remains valid by inverting the clock signal STCK/SRCK and/or the frame sync STFS/SRFS shown in the tables and
in the figures.
2.
There are 2 set of I/O signals for the SSI module. They are from Port C primary function (pad 257 to pad 261) and
Port B alternate function (pad 283 to pad 288). When SSI signals are configured as outputs, they can be viewed
both at Port C primary function and Port B alternate function. When SSI signals are configured as inputs, the SSI
module selects the input based on FMCR register bits in the Clock controller module (CRM). By default, the input
are selected from Port C primary function.
3.
bl = bit length; wl = word length.
Table 33. SSI (Port B Alternate Function) Timing Parameter Table (Continued)
Ref
No.
Parameter
1.8 ± 0.1 V
3.0 ± 0.3 V
Unit
Minimum
Maximum
Minimum
Maximum
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MC9328MXSVP10 | 功能描述:處理器 - 專門應(yīng)用 REDUCED FEATURE CORSICA RoHS:否 制造商:Freescale Semiconductor 類型:Multimedia Applications 核心:ARM Cortex A9 處理器系列:i.MX6 數(shù)據(jù)總線寬度:32 bit 最大時鐘頻率:1 GHz 指令/數(shù)據(jù)緩存: 數(shù)據(jù) RAM 大小:128 KB 數(shù)據(jù) ROM 大小: 工作電源電壓: 最大工作溫度:+ 95 C 安裝風格:SMD/SMT 封裝 / 箱體:MAPBGA-432 |
| MC9328MXSVP10 | 制造商:Freescale Semiconductor 功能描述:Microprocessor |
| MC9328MXSVP10R2 | 功能描述:處理器 - 專門應(yīng)用 REDUCED FEATURE CORSICA RoHS:否 制造商:Freescale Semiconductor 類型:Multimedia Applications 核心:ARM Cortex A9 處理器系列:i.MX6 數(shù)據(jù)總線寬度:32 bit 最大時鐘頻率:1 GHz 指令/數(shù)據(jù)緩存: 數(shù)據(jù) RAM 大小:128 KB 數(shù)據(jù) ROM 大小: 工作電源電壓: 最大工作溫度:+ 95 C 安裝風格:SMD/SMT 封裝 / 箱體:MAPBGA-432 |
| MC932L | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| MC933 | 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:INTEGRATED CIRCUITS |
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