參數資料
型號: MC9RS08KA2CSCR
廠商: Freescale Semiconductor
文件頁數: 88/136頁
文件大?。?/td> 0K
描述: IC MCU 8BIT 2K FLASH 8-SOIC
產品培訓模塊: Mechatronics
USBSpyder08 Discovery Kit
RS08KA2 Low-End Microcontroller Series
MC9RS08KA8 Microcontroller
標準包裝: 1
系列: RS08
核心處理器: RS08
芯體尺寸: 8-位
速度: 10MHz
外圍設備: LVD,POR,WDT
輸入/輸出數: 4
程序存儲器容量: 2KB(2K x 8)
程序存儲器類型: 閃存
RAM 容量: 63 x 8
電壓 - 電源 (Vcc/Vdd): 1.8 V ~ 5.5 V
振蕩器型: 內部
工作溫度: -40°C ~ 85°C
封裝/外殼: 8-SOIC(0.154",3.90mm 寬)
包裝: 標準包裝
其它名稱: MC9RS08KA2CSCRDKR
Chapter 7 Keyboard Interrupt (RS08KBIV1)
MC9RS08KA2 Series Data Sheet, Rev. 4
Freescale Semiconductor
55
7.4
Functional Description
This on-chip peripheral module is called a keyboard interrupt (KBI) module because it was originally
designed to simplify the connection and use of row-column matrices of keyboard switches. However, these
inputs are also useful as extra external interrupt inputs and as an external means of waking the MCU from
stop or wait low-power modes.
The KBI module allows its pins to act as additional interrupt sources. Writing to the KBIPEn bits in the
keyboard interrupt pin enable register (KBIPE) independently enables or disables each KBI pin. Each KBI
pin can be configured as edge sensitive or edge and level sensitive based on the KBMOD bit in the
keyboard interrupt status and control register (KBISC). Edge sensitive can be software programmed to be
either falling or rising; the level can be either low or high. The polarity of the edge or edge and level
sensitivity is selected using the KBEDGn bits in the keyboard interrupt edge select register (KBIES).
Synchronous logic is used to detect edges. Prior to detecting an edge, enabled keyboard inputs must be at
the deasserted logic level. A falling edge is detected when an enabled keyboard input signal is seen as a
logic 1 (the deasserted level) during one bus cycle and then a logic 0 (the asserted level) during the next
cycle. A rising edge is detected when the input signal is seen as a logic 0 during one bus cycle and then a
logic 1 during the next cycle.
7.4.1
Edge Only Sensitivity
A valid edge on an enabled KBI pin will set KBF in KBISC. If KBIE in KBISC is set, an interrupt request
will be presented to the CPU. Clearing of KBF is accomplished by writing a 1 to KBACK in KBISC.
7.4.2
Edge and Level Sensitivity
A valid edge or level on an enabled KBI pin will set KBF in KBISC. If KBIE in KBISC is set, an interrupt
request will be presented to the CPU. Clearing of KBF is accomplished by writing a 1 to KBACK in
KBISC, provided all enabled keyboard inputs are at their deasserted levels. KBF will remain set if any
enabled KBI pin is asserted while attempting to clear by writing a 1 to KBACK.
7.4.3
KBI Pullup/Pulldown Device
The KBI pins does not automatically configure an internal pullup/pulldown device when a KBI pin is
enabled. An internal pull device can be used by configuring the associated I/O port pull device enable
register (PTAPE) and pullup/pulldown control register (PTAPUD).
7.4.4
KBI Initialization
When a keyboard interrupt pin is first enabled, it is possible to get a false keyboard interrupt flag. To
prevent a false interrupt request during keyboard initialization, the user should do the following:
1. Mask keyboard interrupts by clearing KBIE in KBISC.
2. If using internal pullup/pulldown device, configure the associated I/O port pullup/pulldown device.
3. Enable the KBI polarity by setting the appropriate KBEDGn bits in KBIES.
4. Enable the KBI pins by setting the appropriate KBIPEn bits in KBIPE.
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