參數(shù)資料
型號： MC9S08MM128VLH
廠商： FREESCALE SEMICONDUCTOR INC
元件分類： 微控制器/微處理器
英文描述： 8-BIT, FLASH, 48 MHz, MICROCONTROLLER, PQFP64
封裝： 10 X 10 MM, 1.60 MM HEIGHT, ROHS COMPLIANT, LQFP-64
文件頁數(shù)： 26/50頁
文件大小： 970K
代理商： MC9S08MM128VLH
Preliminary Electrical Characteristics
Freescale Semiconductor
32
2.10
MCG and External Oscillator (XOSC) Characteristics
Table 17. MCG (Temperature Range = –40 to 105°C Ambient)
#
Rating
Symbol
Min
Typical
Max
Unit
C
1
Internal reference startup time
tirefst
—55
100
μs
D
2
Average internal reference frequency
factory trimmed at
VDD=3.0 V and
temp=25
°C
fint_ft
—
31.25
—
kHz
C
user trimmed
31.25
—
39.0625
C
3
DCO output frequency range -
trimmed
Low range
(DRS=00)
fdco_t
16
—
20
MHz
C
Mid range
(DRS=01)
32
—
40
C
High range1
(DRS=10)
1 This should not exceed the maximum CPU frequency for this device.
40
—
60
C
4
Resolution of trimmed DCO output fre-
quency at fixed voltage and tempera-
ture
with FTRIM
Δf
dco_res_t
—
± 0.1
± 0.2
%fdco
C
without FTRIM
—
± 0.2
± 0.4
C
5
Total deviation of trimmed DCO output
frequency over voltage and tempera-
ture
over voltage and
temperature
Δf
dco_t
—
±1.0
± 2
%fdco
p
over fixed voltage
and temp range
of 0 - 70
°C
—
± 0.5
± 1
C
6
Acquisition time
FLL2
2 This specification applies to any time the FLL reference source or reference divider is changed, trim value is changed,
DMX32 bit is changed, DRS bit is changed, or changing from FLL disabled (BLPE, BLPI) to FLL enabled (FEI, FEE,
FBE, FBI). If a crystal/resonator is being used as the reference, this specification assumes it is already running.
tfll_acquire
——
1
ms
C
PLL3
tpll_acquire
——
1
D
7
Long term Jitter of DCO output clock (averaged over 2mS
interval) 4
CJitter
—0.02
0.2
%fdco
C
8
VCO operating frequency
fvco
7.0
—
55.0
MHz
D
9
PLL reference frequency range
fpll_ref
1.0
—
2.0
MHz
D
10
Jitter of PLL output clock measured
over 625ns 5
Long term
fpll_jitter_625
ns
—
0.5664
—
%fpll
D
11 Lock frequency tolerance
Entry6
Dlock
± 1.49
—
± 2.98
%
D
Exit7
Dunl
± 4.47
—
± 5.97
D
12 Lock time
FLL
tfll_lock
——
tfll_acquire+
1075(1/fint_t)
s
D
PLL
tpll_lock
——
tpll_acquire+
1075(1/fpll_re
f)
D
13
Loss of external clock minimum frequency - RANGE = 0
floc_low
(3/5) x
fint_t
—
kHz
D
14
Loss of external clock minimum frequency - RANGE = 1
floc_high
(16/5) x
fint_t
—
kHz
D
Non-Disclosure Agreement Required
Preliminary — Subject to Change
Because
of
an
order
from
the
United
States
International
Trade
Commission,
BGA-packaged
product
lines
and
part
numbers
indicated
here
currently
are
not
available
from
Freescale
for
import
or
sale
in
the
United
States
prior
to
September
2010:
MC9S08MM128
products
in
81
MAPBGA
packages
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MC9S08MM128VLK 功能描述:8位微控制器 -MCU 8BIT 128K FLASH RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時鐘頻率:50 MHz 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風(fēng)格:SMD/SMT
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