參數(shù)資料
型號: MC9S08MM128VLH
廠商: Freescale Semiconductor
文件頁數(shù): 37/52頁
文件大?。?/td> 0K
描述: IC MCU 8BIT 128K FLASH 64LQFP
標準包裝: 160
系列: S08
核心處理器: S08
芯體尺寸: 8-位
速度: 48MHz
連通性: I²C,SCI,SPI,USB
外圍設備: LVD,POR,PWM,WDT
輸入/輸出數(shù): 33
程序存儲器容量: 128KB(128K x 8)
程序存儲器類型: 閃存
RAM 容量: 12K x 8
電壓 - 電源 (Vcc/Vdd): 1.8 V ~ 3.6 V
數(shù)據(jù)轉換器: A/D 6x16b,D/A 1x12b
振蕩器型: 內部
工作溫度: -40°C ~ 105°C
封裝/外殼: 64-LQFP
包裝: 托盤
Electrical Characteristics
Freescale Semiconductor
42
2.13
Flash Specifications
This section provides details about program/erase times and program-erase endurance for the Flash memory.
Program and erase operations do not require any special power sources other than the normal VDD supply. For more detailed
information about program/erase operations, see the Memory chapter in the Reference Manual for this device
(MC9S08MM128RM).
Table 23. Flash Characteristics
#
Characteristic
Symbol
Min
Typical
Max
Unit
C
1
Supply voltage for program/erase
–40
C to 105CV
prog/erase
1.8
3.6
V
D
2
Supply voltage for read operation
VRead
1.8
3.6
V
D
3
Internal FCLK frequency1
1 The frequency of this clock is controlled by a software setting.
fFCLK
150
200
kHz
D
4
Internal FCLK period (1/FCLK)
tFcyc
5
6.67
sD
5
Byte program time (random location)2
tprog
9tFcyc
P
6
Byte program time (burst mode)2
tBurst
4tFcyc
P
7
Page erase time2
2 These values are hardware state machine controlled. User code does not need to count cycles. This information supplied for
calculating approximate time to program and erase.
tPage
4000
tFcyc
P
8
Mass erase time2
tMass
20,000
tFcyc
P
9
Program/erase endurance3
TL to TH = –40C to + 105C
T = 25
C
3 Typical endurance for flash was evaluated for this product family on the HC9S12Dx64. For additional information on how
Freescale defines typical endurance, please refer to Engineering Bulletin EB619, Typical Endurance for Nonvolatile Memory.
10,000
100,000
cycles
C
10
Data retention4
4 Typical data retention values are based on intrinsic capability of the technology measured at high temperature and de-rated to
25
C using the Arrhenius equation. For additional information on how Freescale defines typical data retention, please refer to
Engineering Bulletin EB618, Typical Data Retention for Nonvolatile Memory.
tD_ret
15
100
years
C
Freescale reserves the right to change the detail specifications as may be required to permit improvements in the design of its products.
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