參數(shù)資料
型號: MCD212
廠商: MOTOROLA INC
元件分類: 顯示控制器
英文描述: Video Decoder and System Controller(with JTAG)
中文描述: 768 X 560 PIXELS CRT GRPH DSPL CTLR, PQFP160
封裝: 1007-01
文件頁數(shù): 17/87頁
文件大小: 872K
代理商: MCD212
MCD212
2–2
MOTOROLA
CSROM
O
Chip Select ROM output. Active low. Asserted by an access on the
system bus in the ROM address area, and when UDS and/or LDS
are asserted.
Chip Select I/O output. Active low. Asserted by an access on the
system bus in the I/O area, and when UDS and/or LDS are
asserted.
Interrupt request output. Active low, three–state. Used to generate
interrupts to the CPU. This pin must be pulled up externally.
CSIO
O
INT
O
Mnemonic
Type
Name and Function
MA0 –
MA9
MD0 –
MD15
O
Memory Address lines. Multiplexed row/column address line outputs
for DRAM control.
Bidirectional Memory Data bus, three–state. Used to transfer data
between DRAM bus and VDSC. Stable when LWR and/or UWR is
asserted during a write cycle. Driven by VDSC during read cycles.
MD0 is the least significant bit.
Row Address Strobe. Active low. Validates the DRAM row address
on the falling edge.
Column Address Strobe for memory bank 1. Active low, three–state.
Validates the DRAM column address on the falling edge. Input
during reset sequence to select/deselect memory bank 1. Active
high validates bank inputs.
Column Address Strobe for memory bank 2. Active low, three–state.
Validates the DRAM column address on the falling edge. Input
during reset sequence to select/deselect memory bank 2. Active
high validates bank inputs.
Write signal for DRAM. Active low. It is asserted when writing
MD8 – MD15 to the DRAM.
Write signal for DRAM. Active low. It is asserted when writing
MD0 – MD7 to the DRAM.
I/O
RAS
O
CAS1
I/O
CAS2
I/O
UWR
O
LWR
O
Mnemonic
Type
Name and Function
R0 – R7
G0 – G7
B0 – B7
OE
VSYNC
O
O
O
I
I/O
Red color output (R7 = MSB, R0 = LSB). Three–state.
Green color output (G7 = MSB, G0 = LSB). Three–state.
Blue color output (B7 = MSB, B0 = LSB). Three–state.
Output Enable. Active high. It disables three–state of RGB output.
Vertical Synchronization. Active low. In master mode, this output is
used as vertical synchronization signal for monitor. In slave TV
mode it becomes a vertical synchronization input.
Horizontal Synchronization. Active low. This output is used as a
horizontal synchronization signal.
Composite synchronization. Active low. This output is used as a
composite synchronization signal.
HSYNC
O
CSYNC
O
相關(guān)PDF資料
PDF描述
MCD221 CD-Interface and Audio Processor(CIAP)
MCD221FU CD-Interface and Audio Processor(CIAP)
MCF5307 UART MODULE
MCF5307TR UART MODULE
MCM32100 1M x 32 Bit Dynamic Random Access Memory Module
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
MCD220-08io1 功能描述:分立半導(dǎo)體模塊 220 Amps 800V RoHS:否 制造商:Infineon Technologies 產(chǎn)品:Thyristor Power Modules 類型:Phase Controls 安裝風(fēng)格:Screw 封裝 / 箱體:DT61 封裝:
MCD220-12io1 功能描述:分立半導(dǎo)體模塊 220 Amps 1200V RoHS:否 制造商:Infineon Technologies 產(chǎn)品:Thyristor Power Modules 類型:Phase Controls 安裝風(fēng)格:Screw 封裝 / 箱體:DT61 封裝:
MCD220-14io1 功能描述:分立半導(dǎo)體模塊 220 Amps 1400V RoHS:否 制造商:Infineon Technologies 產(chǎn)品:Thyristor Power Modules 類型:Phase Controls 安裝風(fēng)格:Screw 封裝 / 箱體:DT61 封裝:
MCD220-16io1 功能描述:分立半導(dǎo)體模塊 220 Amps 1800V RoHS:否 制造商:Infineon Technologies 產(chǎn)品:Thyristor Power Modules 類型:Phase Controls 安裝風(fēng)格:Screw 封裝 / 箱體:DT61 封裝:
MCD220-18io1 功能描述:分立半導(dǎo)體模塊 220 Amps 1600V RoHS:否 制造商:Infineon Technologies 產(chǎn)品:Thyristor Power Modules 類型:Phase Controls 安裝風(fēng)格:Screw 封裝 / 箱體:DT61 封裝: