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參數(shù)資料
| 型號： | MCF52277CVM166 |
| 廠商： | FREESCALE SEMICONDUCTOR INC |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 32-BIT, 166.67 MHz, RISC PROCESSOR, PBGA196 |
| 封裝： | 15 X 15 MM, PLASTIC, ROHS COMPLIANT, MAPBGA-196 |
| 文件頁數(shù)： | 13/42頁 |
| 文件大?。?/td> | 1632K |
| 代理商： | MCF52277CVM166 |
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MCF5227x ColdFire Microprocessor Data Sheet, Rev. 4
Preliminary—Subject to Change Without Notice
Electrical Characteristics
Freescale Semiconductor
20
All processor bus timings are synchronous; that is, input setup/hold and output delay are given in respect to the rising edge of
a reference clock, FB_CLK. The FB_CLK frequency may be the same as the internal system bus frequency or an integer divider
of that frequency.
The following timing numbers indicate when data will be latched or driven onto the external bus, relative to the Flexbus output
clock, FB_CLK. All other timing relationships can be derived from these values.
NOTE
The processor drives the data lines during the first clock cycle of the transfer with the full
32-bit address. This may be ignored by standard connected devices using non-multiplexed
address and data buses. However, some applications may find this feature beneficial.
The address and data busses are muxed between the FlexBus and SDRAM controller. At
the end of the read and write bus cycles the address signals are indeterminate.
Table 11. FlexBus AC Timing Specifications
Num
Characteristic
Symbol
Min
Max
Unit
Notes
Frequency of Operation
—
83.33
MHz
fsys/2
FB1
Clock Period (FB_CLK)
tFBCK
12.0
—
ns
tcyc
FB2
Address, Data, and Control Output Valid (FB_A[23:0], FB_D[31:0],
FB_CS[5:0], FB_R/W, FB_TS, FB_BE/BWE[3:0] and FB_OE)
tFBCHDCV
—7.0
ns
1
1 Timing for chip selects only applies to the FB_CS[5:0] signals. Please see Section 5.7.2.2, “DDR SDRAM AC Timing
Specifications,” for SD_CS[3:0] timing.
FB3
Address, Data, and Control Output Hold (FB_A[23:0], FB_D[31:0],
FB_CS[5:0], FB_R/W, FB_TS, FB_BE/BWE[3:0], and FB_OE)
tFBCHDCI
1—
ns
1, 2
2 The FlexBus supports programming an extension of the address hold. Please consult the device reference manual for more
information.
FB4
Data Input Setup
tDVFBCH
3.5
—
ns
FB5
Data Input Hold
tDIFBCH
0—
ns
FB6
Transfer Acknowledge (TA) Input Setup
tCVFBCH
4—
ns
FB7
Transfer Acknowledge (TA) Input Hold
tCIFBCH
0—
ns
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|---|---|
| MCF5232 | 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:Integrated Microprocessor Hardware Specification |
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| MCF5232CAB80 | 功能描述:微處理器 - MPU MCF5232 V2CORE 64KSRAM RoHS:否 制造商:Atmel 處理器系列:SAMA5D31 核心:ARM Cortex A5 數(shù)據(jù)總線寬度:32 bit 最大時鐘頻率:536 MHz 程序存儲器大小:32 KB 數(shù)據(jù) RAM 大小:128 KB 接口類型:CAN, Ethernet, LIN, SPI,TWI, UART, USB 工作電源電壓:1.8 V to 3.3 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:FBGA-324 |
| MCF5232CVM100 | 功能描述:微處理器 - MPU MCF5232 V2CORE 64KSRAM RoHS:否 制造商:Atmel 處理器系列:SAMA5D31 核心:ARM Cortex A5 數(shù)據(jù)總線寬度:32 bit 最大時鐘頻率:536 MHz 程序存儲器大小:32 KB 數(shù)據(jù) RAM 大小:128 KB 接口類型:CAN, Ethernet, LIN, SPI,TWI, UART, USB 工作電源電壓:1.8 V to 3.3 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:FBGA-324 |
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