參數(shù)資料
型號(hào)： MCF54418CMJ250
廠商： Freescale Semiconductor
文件頁數(shù)： 16/61頁
文件大小： 0K
描述： IC MCU 32BIT 256MAPBGA
標(biāo)準(zhǔn)包裝： 450
系列： MCF5441x
核心處理器： Coldfire V4
芯體尺寸： 32-位
速度： 250MHz
連通性： 1 線，CAN，EBI/EMI，以太網(wǎng)，I²C，智能卡，SPI，SSI，UART/USART，USB，USB OTG
外圍設(shè)備： DMA，PWM，WDT
輸入/輸出數(shù)： 87
程序存儲(chǔ)器類型： ROMless
RAM 容量： 64K x 8
電壓 - 電源 (Vcc/Vdd)： 1.14 V ~ 1.32 V
數(shù)據(jù)轉(zhuǎn)換器： A/D 8x12b，D/A 2x12b
振蕩器型： 內(nèi)部
工作溫度： -40°C ~ 85°C
封裝/外殼： 256-LBGA
包裝： 托盤
Electrical characteristics
MCF5441x ColdFire Microprocessor Data Sheet, Rev. 8
Freescale Semiconductor
23
Solving equations 1 and 2 for K gives:
Eqn. 3
where K is a constant pertaining to the particular part. K can be determined from Equation 3 by measuring PD (at equilibrium)
for a known TA. Using this value of K, the values of PD and TJ can be obtained by solving Equation 1 and Equation 2 iteratively
for any value of TA.
4.3
ESD protection
4.4
Static latch-up (LU)
Two complementary static tests are required on six parts to assess the latch-up performance:
A supply over voltage is applied to each power supply pin.
A current injection is applied to each input, output, and configurable I/O pin.
These tests are compliant with the EIA/JESD 78 IC latch-up standard.
4.5
DC electrical specifications
Table 8. ESD protection characteristics1, 2
1 All ESD testing is in conformity with JESD22 Stress Test Qualification.
2 A device is defined as a failure if after exposure to ESD pulses the device no longer meets
the device specification requirements. Complete DC parametric and functional testing is
performed per applicable specification at room temperature followed by hot temperature,
unless specified otherwise in the device specifications provided in this document.
Characteristics
Symbol
Value
Units
ESD Target for Human Body Model
HBM
2000
V
Table 9. Latch-up results
No.
Symbol
Parameter
Conditions
Class
1
LU
CC
Static latch-up class
TA = 125 °C conforming to JESD 78
II level A
Table 10. Power supply specifications
Characteristic
Symbol
Pin Name
Min
Max
Units
Internal logic supply voltage, nominal 1.2 V
IVDD
IVDD
1.14
1.32
V
FlexBus supply voltage
Nominal 1.8–3.3 V
FBVDD
FB_VDD
1.71
3.63
V
SDRAM supply voltage
DDR2 @ 1.8 V
SDVDD
SD_VDD
1.71
1.98
V
SDRAM input reference voltage
SDVREF
SD_VREF
0.49 x SDVDD
0.51 x SDVDD
V
SDRAM termination supply voltage
SDVTT
SD_VTT
SDVREF –0.04
SDVREF +0.04
V
PLL analog operation voltage range, nominal 3.3 V
PVDD
VDD_OSC_
A_PLL
3.135
3.63
V
KPD
TA 273C
Q
JMA
PD
2
+
=
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