參數(shù)資料
型號(hào): MCF54418CMJ250
廠商: Freescale Semiconductor
文件頁數(shù): 18/61頁
文件大?。?/td> 0K
描述: IC MCU 32BIT 256MAPBGA
標(biāo)準(zhǔn)包裝: 450
系列: MCF5441x
核心處理器: Coldfire V4
芯體尺寸: 32-位
速度: 250MHz
連通性: 1 線,CAN,EBI/EMI,以太網(wǎng),I²C,智能卡,SPI,SSI,UART/USART,USB,USB OTG
外圍設(shè)備: DMA,PWM,WDT
輸入/輸出數(shù): 87
程序存儲(chǔ)器類型: ROMless
RAM 容量: 64K x 8
電壓 - 電源 (Vcc/Vdd): 1.14 V ~ 1.32 V
數(shù)據(jù)轉(zhuǎn)換器: A/D 8x12b,D/A 2x12b
振蕩器型: 內(nèi)部
工作溫度: -40°C ~ 85°C
封裝/外殼: 256-LBGA
包裝: 托盤
Electrical characteristics
MCF5441x ColdFire Microprocessor Data Sheet, Rev. 8
Freescale Semiconductor
25
4.6
Output pad loading and slew rate
The output pins on the MCF5441x devices have programmable slew rates. Table 12 lists the rise/fall time for pins based on the
type of pad used for the signal, the value programmed into the appropriate field of the slew rate control registers, and capacitive
loading. Refer to Table 5 for a list of the external signals to pad connections.
NOTE
To allow the I/O interfaces to run at their maximum frequency, set their respective slew rate
select values to 11.
Weak internal pull-up/pull-down device current1
IAPU
10
315
A
Selectable weak internal pull-up/pull-down device current1
IAPU
25
150
A
Input capacitance 2
All input-only pins
All input/output (three-state) pins
Cin
7
pF
Output loading for CMOS pads (EVDD and FBVDD domains)
Low drive
High drive
CL
50
200
pF
Output loading for SDRAMC pads (SDVDD domain)
Low drive
High drive
CL
5
50
pF
1
Refer to the signals section for pins having weak internal pull-up devices.
2
This parameter is characterized before qualification rather than 100% tested.
Table 12. Output pad slew rates
Pad type1
Slew rate select
field value
Drive load
(pF)
Rise/fall time
(ns)
ssr
11
50
2.2
200
6
10
50
22
200
28
01
50
42
200
50
00
50
210
200
220
Table 11. I/O electrical specifications (continued)
Characteristic
Symbol
Min
Max
Units
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