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參數(shù)資料
| 型號： | MCF5485CZP200 |
| 廠商： | Freescale Semiconductor |
| 文件頁數(shù)： | 33/34頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC MPU 32BIT COLDF 388-PBGA |
| 標準包裝： | 40 |
| 系列： | MCF548x |
| 核心處理器： | Coldfire V4E |
| 芯體尺寸： | 32-位 |
| 速度： | 200MHz |
| 連通性： | CAN，EBI/EMI，以太網(wǎng)，I²C，SPI，UART/USART，USB |
| 外圍設(shè)備： | DMA，PWM，WDT |
| 輸入/輸出數(shù)： | 99 |
| 程序存儲器類型： | ROMless |
| RAM 容量： | 32K x 8 |
| 電壓 - 電源 (Vcc/Vdd)： | 1.43 V ~ 1.58 V |
| 振蕩器型： | 外部 |
| 工作溫度： | -40°C ~ 85°C |
| 封裝/外殼： | 388-BBGA |
| 包裝： | 托盤 |
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MCF548x ColdFire Microprocessor, Rev. 4
Hardware Design Considerations
Freescale Semiconductor
8
4.3
General USB Layout Guidelines
4.3.1
USB D+ and D- High-Speed Traces
1. High speed clock and the USBD+ and USBD- differential pair should be routed first.
2. Route USBD+ and USBD- signals on the top layer of the board.
3. The trace width and spacing of the USBD+ and USBD- signals should be such that the differential impedance is 90
Ω.
4. Route traces over continuous planes (power and ground)—they should not pass over any power/ground plane slots or
anti-etch. When placing connectors, make sure the ground plane clear-outs around each pin have ground continuity
between all pins.
5. Maintain the parallelism (skew matched) between USBD+ and USBD-. These traces should be the same overall length.
6. Do not route USBD+ and USBD- traces under oscillators or parallel to clock traces and/or data buses. Minimize the
lengths of high speed signals that run parallel to the USBD+ and USBD- pair. Maintain a minimum 50mil spacing to
clock signals.
7. Keep USBD+ and USBD- traces as short as possible.
8. Route USBD+, USBD-, and USBVBUS signals with a minimum amount of vias and corners. Use 45° turns.
9. Stubs should be avoided as much as possible. If they cannot be avoided, stubs should be no greater than 200mils.
4.3.2
USB VBUS Traces
Connecting the USBVBUS pin directly to the 5V VBUS signal from the USB connector can cause long-term reliability
problems in the ESD network of the processor. Therefore, use of an external voltage divider for VBUS is recommended.
Figure 4 and Figure 5 depict possible connections for VBUS. Point A, marked in each figure, is where a 5V version of VBUS
should connect. Point B, marked in each figure, is where a 3.3V version of VBUS should connect to the USBVBUS pin on the
device.
Figure 4. Preferred VBUS Connections
Figure 5. Alternate VBUS Connections
4.3.3
USB Receptacle Connections
It is recommended to connect the shield and the ground pin of the B USB receptacle for upstream ports to the board ground
plane. The ground pin of the A USB receptacles for downstream ports should also be connected to the board ground plane, but
industry practice varies widely on the connection of the shield of the A USB receptacles to other system grounds. Take
precautions for control of ground loops between hosts and self-powered USB devices through the cable shield.
50k
MCF548x
B
(3.3V)
A
(5V)
8.2k
20k
50k
MCF548x
B
(3.3V)
A
(5V)
50k
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相關(guān)代理商/技術(shù)參數(shù) |
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